[llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)

[Quentin Colombet via llvm-commits]

https://github.com/qcolombet commented:

The implementation looks fine but also problematic, more on that below, I let @arsenm give the final approval for the AMDGPU changes.

The comments are actually misleading as in these are not anti hints meaning that when an anti hint is set, that register will not be used at all (it's not a "should not" it's a "must not" right now, unless I missed something).
Bottom line IIRC "register not in allocation order == register not available for assignment".

Where I'm going is I believe this can lead to additional splitting/spilling if used too aggressively.

High level nit: All comments must be proper sentences. I.e., they need to finish with a punctuation. https://llvm.org/docs/CodingStandards.html#commenting

https://github.com/llvm/llvm-project/pull/156943