[llvm] [WebAssembly] Optimize away mask of 63 for shl ( zext (and i32 63))) (PR #152397)

[Jasmine Tang via llvm-commits]

================
@@ -101,6 +105,9 @@ def : Pat<(shl I64:$lhs, (and I64:$rhs, 63)), (SHL_I64 I64:$lhs, I64:$rhs)>;
 def : Pat<(sra I64:$lhs, (and I64:$rhs, 63)), (SHR_S_I64 I64:$lhs, I64:$rhs)>;
 def : Pat<(srl I64:$lhs, (and I64:$rhs, 63)), (SHR_U_I64 I64:$lhs, I64:$rhs)>;
 
+def : Pat<(shl I64:$lhs, (zext(shiftMask64FromI32 I32:$rhs))),
+          (SHL_I64 I64:$lhs, (I64_EXTEND_U_I32 I32:$rhs))>;
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badumbatish wrote:

hmm i think this makes more sense. Although i think you mean in the suggestions SHL_I64 since we're using shl in the beginning? Also i think there will be an error for register type if i do COPY for i32:$rhs
```
*** Bad machine code: Illegal virtual register for instruction ***
- function:    shl_i64_i32
- basic block: %bb.0  (0x11d0177c0)
- instruction: %1:i64 = COPY_I64 %0:i32, implicit-def $arguments
- operand 1:   %0:i32
Expected a I64 register, but got a I32 register
```

would sth like this work?
```
def : Pat<(shl I64:$lhs, (zext (and I32:$rhs, 63))),
                               (SHL_I64 I64:$lhs, (I64_EXTEND_U_I32 I32:$rhs))>;
```

https://github.com/llvm/llvm-project/pull/152397