[llvm] 66e18b8 - [SLP][NFC]Add a test with single op inst, used in many nodes, NFC.
Alexey Bataev via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 26 11:16:02 PST 2025
Author: Alexey Bataev
Date: 2025-11-26T11:15:48-08:00
New Revision: 66e18b86b8b1e98eeb71d7ab57cb09a26dff6b96
URL: https://github.com/llvm/llvm-project/commit/66e18b86b8b1e98eeb71d7ab57cb09a26dff6b96
DIFF: https://github.com/llvm/llvm-project/commit/66e18b86b8b1e98eeb71d7ab57cb09a26dff6b96.diff
LOG: [SLP][NFC]Add a test with single op inst, used in many nodes, NFC.
Added:
llvm/test/Transforms/SLPVectorizer/X86/user-with-multi-copyable-ops.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/user-with-multi-copyable-ops.ll b/llvm/test/Transforms/SLPVectorizer/X86/user-with-multi-copyable-ops.ll
new file mode 100644
index 0000000000000..7b298723d93b5
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/user-with-multi-copyable-ops.ll
@@ -0,0 +1,123 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mcpu=icelake-server -slp-threshold=-37 < %s | FileCheck %s
+
+declare double @llvm.fmuladd.f64(double, double, double)
+
+define void @test(ptr %this, ptr %0, double %1) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: ptr [[THIS:%.*]], ptr [[TMP0:%.*]], double [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] {
+; CHECK-NEXT: [[IF_ELSE:.*:]]
+; CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8
+; CHECK-NEXT: [[ARRAYIDX_I1464:%.*]] = getelementptr i8, ptr [[TMP0]], i64 8
+; CHECK-NEXT: [[TMP3:%.*]] = load double, ptr [[ARRAYIDX_I1464]], align 8
+; CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[THIS]], align 8
+; CHECK-NEXT: [[DIV251:%.*]] = fmul double [[TMP1]], 0.000000e+00
+; CHECK-NEXT: [[MUL257:%.*]] = fmul double [[TMP4]], 0.000000e+00
+; CHECK-NEXT: [[MUL305:%.*]] = fmul double [[TMP4]], 0.000000e+00
+; CHECK-NEXT: [[TMP5:%.*]] = fneg double [[TMP2]]
+; CHECK-NEXT: [[NEG356:%.*]] = fmul double [[TMP1]], [[TMP5]]
+; CHECK-NEXT: [[TMP6:%.*]] = tail call double @llvm.fmuladd.f64(double [[NEG356]], double 0.000000e+00, double 0.000000e+00)
+; CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[THIS]], align 8
+; CHECK-NEXT: [[TMP8:%.*]] = fneg double [[TMP3]]
+; CHECK-NEXT: [[NEG380:%.*]] = fmul double [[TMP1]], [[TMP8]]
+; CHECK-NEXT: [[TMP9:%.*]] = tail call double @llvm.fmuladd.f64(double [[NEG380]], double 0.000000e+00, double [[MUL257]])
+; CHECK-NEXT: [[FNEG381:%.*]] = fneg double [[TMP9]]
+; CHECK-NEXT: [[TMP10:%.*]] = tail call double @llvm.fmuladd.f64(double [[NEG380]], double 0.000000e+00, double 0.000000e+00)
+; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x double> poison, double [[DIV251]], i32 0
+; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <2 x double> [[TMP11]], <2 x double> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP13:%.*]] = insertelement <2 x double> poison, double [[FNEG381]], i32 0
+; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x double> [[TMP13]], double [[TMP10]], i32 1
+; CHECK-NEXT: [[TMP15:%.*]] = fmul <2 x double> [[TMP12]], [[TMP14]]
+; CHECK-NEXT: [[NEG417:%.*]] = fneg double [[MUL257]]
+; CHECK-NEXT: [[TMP16:%.*]] = tail call double @llvm.fmuladd.f64(double [[NEG417]], double 0.000000e+00, double 0.000000e+00)
+; CHECK-NEXT: [[FNEG418:%.*]] = fneg double [[TMP16]]
+; CHECK-NEXT: [[MUL419:%.*]] = fmul double [[DIV251]], [[FNEG418]]
+; CHECK-NEXT: [[NEG436:%.*]] = fmul double [[TMP1]], [[TMP5]]
+; CHECK-NEXT: [[TMP17:%.*]] = tail call double @llvm.fmuladd.f64(double [[NEG436]], double 0.000000e+00, double 0.000000e+00)
+; CHECK-NEXT: [[FNEG437:%.*]] = fneg double [[TMP17]]
+; CHECK-NEXT: [[TMP18:%.*]] = fneg double [[TMP4]]
+; CHECK-NEXT: [[NEG455:%.*]] = fmul double [[TMP1]], [[TMP18]]
+; CHECK-NEXT: [[TMP19:%.*]] = tail call double @llvm.fmuladd.f64(double [[NEG455]], double 0.000000e+00, double [[MUL305]])
+; CHECK-NEXT: [[TMP20:%.*]] = tail call double @llvm.fmuladd.f64(double [[NEG455]], double 0.000000e+00, double 0.000000e+00)
+; CHECK-NEXT: [[FNEG474:%.*]] = fneg double [[TMP20]]
+; CHECK-NEXT: [[NEG492:%.*]] = fneg double [[MUL305]]
+; CHECK-NEXT: [[TMP21:%.*]] = tail call double @llvm.fmuladd.f64(double [[NEG492]], double 0.000000e+00, double 0.000000e+00)
+; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x double> poison, double [[DIV251]], i32 0
+; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <4 x double> [[TMP22]], <4 x double> poison, <4 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x double> poison, double [[FNEG437]], i32 0
+; CHECK-NEXT: [[TMP25:%.*]] = insertelement <4 x double> [[TMP24]], double [[TMP19]], i32 1
+; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x double> [[TMP25]], double [[FNEG474]], i32 2
+; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x double> [[TMP26]], double [[TMP21]], i32 3
+; CHECK-NEXT: [[TMP28:%.*]] = fmul <4 x double> [[TMP23]], [[TMP27]]
+; CHECK-NEXT: [[TMP29:%.*]] = insertelement <8 x double> poison, double [[TMP6]], i32 0
+; CHECK-NEXT: [[TMP30:%.*]] = shufflevector <2 x double> [[TMP15]], <2 x double> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+; CHECK-NEXT: [[TMP31:%.*]] = shufflevector <8 x double> [[TMP29]], <8 x double> [[TMP30]], <8 x i32> <i32 0, i32 8, i32 9, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+; CHECK-NEXT: [[TMP32:%.*]] = insertelement <8 x double> [[TMP31]], double [[MUL419]], i32 3
+; CHECK-NEXT: [[TMP33:%.*]] = shufflevector <4 x double> [[TMP28]], <4 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
+; CHECK-NEXT: [[TMP34:%.*]] = shufflevector <8 x double> [[TMP32]], <8 x double> [[TMP33]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
+; CHECK-NEXT: [[TMP35:%.*]] = fptrunc <8 x double> [[TMP34]] to <8 x float>
+; CHECK-NEXT: store <8 x float> [[TMP35]], ptr [[TMP7]], align 4
+; CHECK-NEXT: ret void
+;
+if.else:
+ %2 = load double, ptr %0, align 8
+ %arrayidx.i1464 = getelementptr i8, ptr %0, i64 8
+ %3 = load double, ptr %arrayidx.i1464, align 8
+ %4 = load double, ptr %this, align 8
+ %div251 = fmul double %1, 0.000000e+00
+ %mul257 = fmul double %4, 0.000000e+00
+ %mul305 = fmul double %4, 0.000000e+00
+ %5 = fneg double %2
+ %neg356 = fmul double %1, %5
+ %6 = tail call double @llvm.fmuladd.f64(double %neg356, double 0.000000e+00, double 0.000000e+00)
+ %conv358 = fptrunc double %6 to float
+ %7 = load ptr, ptr %this, align 8
+ store float %conv358, ptr %7, align 4
+ %8 = fneg double %3
+ %neg380 = fmul double %1, %8
+ %9 = tail call double @llvm.fmuladd.f64(double %neg380, double 0.000000e+00, double %mul257)
+ %fneg381 = fneg double %9
+ %mul382 = fmul double %div251, %fneg381
+ %conv383 = fptrunc double %mul382 to float
+ %arrayidx.i2136 = getelementptr i8, ptr %7, i64 4
+ store float %conv383, ptr %arrayidx.i2136, align 4
+ %10 = tail call double @llvm.fmuladd.f64(double %neg380, double 0.000000e+00, double 0.000000e+00)
+ %mul400 = fmul double %10, %div251
+ %conv401 = fptrunc double %mul400 to float
+ %arrayidx.i2178 = getelementptr i8, ptr %7, i64 8
+ store float %conv401, ptr %arrayidx.i2178, align 4
+ %neg417 = fneg double %mul257
+ %11 = tail call double @llvm.fmuladd.f64(double %neg417, double 0.000000e+00, double 0.000000e+00)
+ %fneg418 = fneg double %11
+ %mul419 = fmul double %div251, %fneg418
+ %conv420 = fptrunc double %mul419 to float
+ %arrayidx.i2220 = getelementptr i8, ptr %7, i64 12
+ store float %conv420, ptr %arrayidx.i2220, align 4
+ %neg436 = fmul double %1, %5
+ %12 = tail call double @llvm.fmuladd.f64(double %neg436, double 0.000000e+00, double 0.000000e+00)
+ %fneg437 = fneg double %12
+ %mul438 = fmul double %div251, %fneg437
+ %conv439 = fptrunc double %mul438 to float
+ %arrayidx.i2262 = getelementptr i8, ptr %7, i64 16
+ store float %conv439, ptr %arrayidx.i2262, align 4
+ %13 = fneg double %4
+ %neg455 = fmul double %1, %13
+ %14 = tail call double @llvm.fmuladd.f64(double %neg455, double 0.000000e+00, double %mul305)
+ %mul456 = fmul double %14, %div251
+ %conv457 = fptrunc double %mul456 to float
+ %arrayidx.i2304 = getelementptr i8, ptr %7, i64 20
+ store float %conv457, ptr %arrayidx.i2304, align 4
+ %15 = tail call double @llvm.fmuladd.f64(double %neg455, double 0.000000e+00, double 0.000000e+00)
+ %fneg474 = fneg double %15
+ %mul475 = fmul double %div251, %fneg474
+ %conv476 = fptrunc double %mul475 to float
+ %arrayidx.i2346 = getelementptr i8, ptr %7, i64 24
+ store float %conv476, ptr %arrayidx.i2346, align 4
+ %neg492 = fneg double %mul305
+ %16 = tail call double @llvm.fmuladd.f64(double %neg492, double 0.000000e+00, double 0.000000e+00)
+ %mul493 = fmul double %16, %div251
+ %conv494 = fptrunc double %mul493 to float
+ %arrayidx.i2388 = getelementptr i8, ptr %7, i64 28
+ store float %conv494, ptr %arrayidx.i2388, align 4
+ ret void
+}
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