[llvm] [SPIRV] Addition of extension SPV_KHR_non_semantic_info and SPV_KHR_relaxed_extended_instruction (PR #169643)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 26 04:02:05 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-spir-v
Author: Aadesh Premkumar (aadeshps-mcw)
<details>
<summary>Changes</summary>
--Added support for the extension SPV_KHR_non_semantic_info
--Added support for the extension SPV_KHR_relaxed_extended_instruction
--Added instructions from the documentation of the extension.
--Added supporting tests for the same.
Same as #<!-- -->165302
---
Patch is 706.66 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/169643.diff
27 Files Affected:
- (modified) llvm/docs/SPIRVUsage.rst (+2)
- (modified) llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp (+2-1)
- (modified) llvm/lib/Target/SPIRV/SPIRV.h (+1-1)
- (modified) llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp (+3-1)
- (modified) llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp (+1813-195)
- (modified) llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h (+24)
- (modified) llvm/lib/Target/SPIRV/SPIRVInstrInfo.td (+2)
- (modified) llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp (+3-1)
- (modified) llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp (+72-9)
- (modified) llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td (+1)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-build-identifier-storagepath.ll (+54)
- (modified) llvm/test/CodeGen/SPIRV/debug-info/debug-compilation-unit.ll (+18-15)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-function.ll (+55)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-imported-entity.ll (+64)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-scope.ll (+62)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-line.ll (+117)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-macro-def.ll (+78)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-qualifier.ll (+54)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-source-continued.ll (+46)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-type-array.ll (+75)
- (modified) llvm/test/CodeGen/SPIRV/debug-info/debug-type-basic.ll (+37-36)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite.ll (+70)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-type-enum.ll (+70)
- (modified) llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll (+39-41)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-type-ptrtomember.ll (+74)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-type-template.ll (+80)
- (added) llvm/test/CodeGen/SPIRV/debug-info/debug-typedef.ll (+85)
``````````diff
diff --git a/llvm/docs/SPIRVUsage.rst b/llvm/docs/SPIRVUsage.rst
index aedb6643cf581..c3c48b8650515 100644
--- a/llvm/docs/SPIRVUsage.rst
+++ b/llvm/docs/SPIRVUsage.rst
@@ -245,6 +245,8 @@ Below is a list of supported SPIR-V extensions, sorted alphabetically by their e
- Adds execution mode and capability to enable maximal reconvergence.
* - ``SPV_ALTERA_blocking_pipes``
- Adds new pipe read and write functions that have blocking semantics instead of the non-blocking semantics of the existing pipe read/write functions.
+ * - `` SPV_KHR_relaxed_extended_instruction``
+ - Adds the ability to have forward declaration in some specific non-semantic instructions.
SPIR-V representation in LLVM IR
================================
diff --git a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
index 62f5e47c5ea3b..bf343a156ff5f 100644
--- a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
+++ b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
@@ -110,7 +110,8 @@ void SPIRVInstPrinter::printInst(const MCInst *MI, uint64_t Address,
printOpDecorate(MI, OS);
} else if (OpCode == SPIRV::OpExtInstImport) {
recordOpExtInstImport(MI);
- } else if (OpCode == SPIRV::OpExtInst) {
+ } else if (OpCode == SPIRV::OpExtInst ||
+ OpCode == SPIRV::OpExtInstWithForwardRefsKHR) {
printOpExtInst(MI, OS);
} else if (OpCode == SPIRV::UNKNOWN_type) {
printUnknownType(MI, OS);
diff --git a/llvm/lib/Target/SPIRV/SPIRV.h b/llvm/lib/Target/SPIRV/SPIRV.h
index fa85ee781c249..b7cea427a7dd1 100644
--- a/llvm/lib/Target/SPIRV/SPIRV.h
+++ b/llvm/lib/Target/SPIRV/SPIRV.h
@@ -32,7 +32,7 @@ FunctionPass *createSPIRVPreLegalizerPass();
FunctionPass *createSPIRVPostLegalizerPass();
ModulePass *createSPIRVEmitIntrinsicsPass(SPIRVTargetMachine *TM);
ModulePass *createSPIRVPrepareGlobalsPass();
-MachineFunctionPass *createSPIRVEmitNonSemanticDIPass(SPIRVTargetMachine *TM);
+ModulePass *createSPIRVEmitNonSemanticDIPass(SPIRVTargetMachine *TM);
InstructionSelector *
createSPIRVInstructionSelector(const SPIRVTargetMachine &TM,
const SPIRVSubtarget &Subtarget,
diff --git a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
index ac09b937a584a..4c113e48895d2 100644
--- a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
@@ -163,7 +163,9 @@ static const std::map<std::string, SPIRV::Extension::Extension, std::less<>>
{"SPV_INTEL_kernel_attributes",
SPIRV::Extension::Extension::SPV_INTEL_kernel_attributes},
{"SPV_ALTERA_blocking_pipes",
- SPIRV::Extension::Extension::SPV_ALTERA_blocking_pipes}};
+ SPIRV::Extension::Extension::SPV_ALTERA_blocking_pipes},
+ {"SPV_KHR_relaxed_extended_instruction",
+ SPIRV::Extension::Extension::SPV_KHR_relaxed_extended_instruction}};
bool SPIRVExtensionsParser::parse(cl::Option &O, StringRef ArgName,
StringRef ArgValue,
diff --git a/llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp b/llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
index 318ef0679ba03..884d44dde3066 100644
--- a/llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
@@ -18,6 +18,7 @@
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Register.h"
+#include "llvm/Config/llvm-config.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/DebugProgramInstruction.h"
#include "llvm/IR/Metadata.h"
@@ -29,17 +30,215 @@
using namespace llvm;
namespace {
-struct SPIRVEmitNonSemanticDI : public MachineFunctionPass {
+struct SPIRVCodeGenContext {
+ MachineIRBuilder &MIRBuilder;
+ MachineRegisterInfo &MRI;
+ SPIRVGlobalRegistry *GR;
+ const SPIRVType *VoidTy;
+ const SPIRVType *I32Ty;
+ const SPIRVInstrInfo *TII;
+ const SPIRVRegisterInfo *TRI;
+ const RegisterBankInfo *RBI;
+ MachineFunction &MF;
+ const Register &I32ZeroReg;
+ SPIRVTargetMachine *TM;
+ SmallVector<std::pair<const DIFile *const, const Register>, 24>
+ &SourceRegPairs;
+ SmallVector<std::pair<const DIScope *const, const Register>, 24>
+ &ScopeRegPairs;
+ SmallVector<std::pair<const DISubroutineType *const, const Register>, 24>
+ &SubRoutineTypeRegPairs;
+ SmallVector<std::pair<const DIBasicType *const, const Register>, 24>
+ &BasicTypeRegPairs;
+ SmallVector<std::pair<const DICompositeType *const, const Register>, 24>
+ &CompositeTypeRegPairs;
+ SmallVector<std::pair<const DIFile *const, const Register>, 24>
+ &CompileUnitRegPairs;
+ SmallVector<std::pair<const DIDerivedType *const, const Register>, 24>
+ &PointerRegPairs;
+
+ SPIRVCodeGenContext(
+ MachineIRBuilder &Builder, MachineRegisterInfo &RegInfo,
+ SPIRVGlobalRegistry *Registry, const SPIRVType *VTy,
+ const SPIRVType *I32Ty, const SPIRVInstrInfo *TI,
+ const SPIRVRegisterInfo *TR, const RegisterBankInfo *RB,
+ MachineFunction &Function, const Register &ZeroReg,
+ SPIRVTargetMachine *TargetMachine,
+ SmallVector<std::pair<const DIFile *const, const Register>, 24>
+ &SourceRegisterPairs,
+ SmallVector<std::pair<const DIScope *const, const Register>, 24>
+ &ScopeRegisterPairs,
+ SmallVector<std::pair<const DISubroutineType *const, const Register>, 24>
+ &SubRoutineTypeRegisterPairs,
+ SmallVector<std::pair<const DIBasicType *const, const Register>, 24>
+ &BasicTypePairs,
+ SmallVector<std::pair<const DICompositeType *const, const Register>, 24>
+ &CompositeTypePairs,
+ SmallVector<std::pair<const DIFile *const, const Register>, 24>
+ &CompileUnitPairs,
+ SmallVector<std::pair<const DIDerivedType *const, const Register>, 24>
+ &PointerPairs)
+ : MIRBuilder(Builder), MRI(RegInfo), GR(Registry), VoidTy(VTy),
+ I32Ty(I32Ty), TII(TI), TRI(TR), RBI(RB), MF(Function),
+ I32ZeroReg(ZeroReg), TM(TargetMachine),
+ SourceRegPairs(SourceRegisterPairs), ScopeRegPairs(ScopeRegisterPairs),
+ SubRoutineTypeRegPairs(SubRoutineTypeRegisterPairs),
+ BasicTypeRegPairs(BasicTypePairs),
+ CompositeTypeRegPairs(CompositeTypePairs),
+ CompileUnitRegPairs(CompileUnitPairs), PointerRegPairs(PointerPairs) {}
+};
+struct DebugInfoCollector {
+ SmallPtrSet<DIBasicType *, 12> BasicTypes;
+ SmallPtrSet<DIDerivedType *, 12> PointerDerivedTypes;
+ SmallPtrSet<DIDerivedType *, 12> QualifiedDerivedTypes;
+ SmallPtrSet<DIDerivedType *, 12> TypedefTypes;
+ SmallPtrSet<DIDerivedType *, 12> InheritedTypes;
+ SmallPtrSet<DIDerivedType *, 12> PtrToMemberTypes;
+ SmallVector<const DIImportedEntity *, 5> ImportedEntities;
+ SmallVector<const DIFile *, 4> CUFileNodes;
+ SmallVector<const DICompileUnit *, 4> CUNodes;
+ SmallPtrSet<DISubprogram *, 12> SubPrograms;
+ SmallPtrSet<DISubroutineType *, 12> SubRoutineTypes;
+ SmallPtrSet<DIScope *, 12> LexicalScopes;
+ SmallPtrSet<DICompositeType *, 12> ArrayTypes;
+ SmallPtrSet<const DICompositeType *, 8> CompositeTypesWithTemplates;
+ SmallPtrSet<const DICompositeType *, 8> CompositeTypes;
+ SmallPtrSet<const DICompositeType *, 8> EnumTypes;
+ DenseSet<const DIType *> visitedTypes;
+};
+struct SPIRVEmitNonSemanticDI : public ModulePass {
static char ID;
SPIRVTargetMachine *TM;
SPIRVEmitNonSemanticDI(SPIRVTargetMachine *TM = nullptr)
- : MachineFunctionPass(ID), TM(TM) {}
+ : ModulePass(ID), TM(TM) {}
- bool runOnMachineFunction(MachineFunction &MF) override;
+ bool runOnModule(llvm::Module &M) override;
private:
bool IsGlobalDIEmitted = false;
- bool emitGlobalDI(MachineFunction &MF);
+ bool emitGlobalDI(MachineFunction &MF, SPIRVCodeGenContext &Ctx);
+ Register EmitOpString(StringRef, SPIRVCodeGenContext &Ctx);
+ uint32_t transDebugFlags(const DINode *DN);
+ uint32_t mapTagToCompositeEncoding(const DICompositeType *CT);
+ uint32_t mapTagToQualifierEncoding(unsigned Tag);
+ uint32_t mapDebugFlags(DINode::DIFlags DFlags);
+ uint32_t mapImportedTagToEncoding(const DIImportedEntity *Imported);
+
+ Register EmitDIInstruction(SPIRV::NonSemanticExtInst::NonSemanticExtInst Inst,
+ ArrayRef<Register> Operands,
+ SPIRVCodeGenContext &Ctx, bool HasForwardRef,
+ Register DefReg = Register(0));
+
+ Register getOrCreateFileRegister(const DIFile *File,
+ SPIRVCodeGenContext &Ctx);
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ void emitDebugLineInstructions(SPIRVCodeGenContext &Ctx);
+ void emitDebugLinePerInstruction(MachineInstr &MI, SPIRVCodeGenContext &Ctx);
+
+ Register findEmittedBasicTypeReg(
+ const DIType *BaseType,
+ const SmallVectorImpl<std::pair<const DIBasicType *const, const Register>>
+ &BasicTypeRegPairs);
+
+ Register findEmittedCompositeTypeReg(
+ const DIType *BaseType,
+ const SmallVectorImpl<std::pair<const DICompositeType *const,
+ const Register>> &CompositeTypeRegPairs);
+
+ Register emitDebugSource(StringRef FilePath, StringRef FileContents,
+ SPIRVCodeGenContext &Ctx);
+
+ void extractTypeMetadata(DIType *Ty, DebugInfoCollector &Collector);
+
+ void handleCompositeType(DICompositeType *CT, DebugInfoCollector &Collector);
+ void handleDerivedType(DIDerivedType *DT, DebugInfoCollector &Collector);
+
+ void emitDebugBuildIdentifier(StringRef BuildIdentifier,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugStoragePath(StringRef BuildStoragePath,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugBasicTypes(const SmallPtrSetImpl<DIBasicType *> &BasicTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugPointerTypes(
+ const SmallPtrSetImpl<DIDerivedType *> &PointerDerivedTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitSingleCompilationUnit(
+ StringRef FilePath, int64_t SourceLanguage, SPIRVCodeGenContext &Ctx,
+ Register DebugInfoVersionReg, Register DwarfVersionReg,
+ Register &DebugSourceResIdReg, Register &DebugCompUnitResIdReg,
+ const DIFile *FileNode, const DICompileUnit *CUNode);
+
+ void emitLexicalScopes(const SmallPtrSetImpl<DIScope *> &LexicalScopes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugArrayTypes(const SmallPtrSetImpl<DICompositeType *> &ArrayTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugVectorTypes(DICompositeType *ArrayTy, Register BaseTypeReg,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugTypeComposite(const DICompositeType *CompTy,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitAllTemplateDebugInstructions(
+ const SmallPtrSetImpl<const DICompositeType *> &TemplatedTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitAllDebugTypeComposites(
+ const SmallPtrSetImpl<const DICompositeType *> &CompositeTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitSubroutineTypes(
+ const SmallPtrSet<DISubroutineType *, 12> &SubRoutineTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ Register findBaseTypeRegisterRecursive(const DIType *Ty,
+ SPIRVCodeGenContext &Ctx,
+ bool &IsForwardRef);
+
+ void emitSubprograms(const SmallPtrSet<DISubprogram *, 12> &SubPrograms,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugTypeMember(const DIDerivedType *Member,
+ SPIRVCodeGenContext &Ctx,
+ const Register &CompositeReg,
+ SmallVectorImpl<Register> &MemberRegs,
+ Register DebugSourceReg);
+
+ void emitDebugMacroDefs(MachineFunction &MF, SPIRVCodeGenContext &Ctx);
+
+ void emitDebugMacroUndef(const DIMacro *MacroUndef, StringRef FileName,
+ SPIRVCodeGenContext &Ctx,
+ const DenseMap<StringRef, Register> &MacroDefRegs);
+
+ void
+ emitDebugTypeEnum(const SmallPtrSetImpl<const DICompositeType *> &EnumTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugQualifiedTypes(
+ const SmallPtrSetImpl<DIDerivedType *> &QualifiedDerivedTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugTypedefs(const SmallPtrSetImpl<DIDerivedType *> &TypedefTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugImportedEntities(
+ const SmallVectorImpl<const DIImportedEntity *> &ImportedEntities,
+ SPIRVCodeGenContext &Ctx);
+
+ Register emitDebugGlobalVariable(const DIGlobalVariableExpression *GVE,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitAllDebugGlobalVariables(MachineFunction &MF,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugTypePtrToMember(
+ const SmallPtrSetImpl<DIDerivedType *> &PtrToMemberTypes,
+ SPIRVCodeGenContext &Ctx);
};
} // anonymous namespace
@@ -48,8 +247,7 @@ INITIALIZE_PASS(SPIRVEmitNonSemanticDI, DEBUG_TYPE,
char SPIRVEmitNonSemanticDI::ID = 0;
-MachineFunctionPass *
-llvm::createSPIRVEmitNonSemanticDIPass(SPIRVTargetMachine *TM) {
+ModulePass *llvm::createSPIRVEmitNonSemanticDIPass(SPIRVTargetMachine *TM) {
return new SPIRVEmitNonSemanticDI(TM);
}
@@ -64,6 +262,12 @@ enum BaseTypeAttributeEncoding {
UnsignedChar = 7
};
+enum CompositeTypeAttributeEncoding { Class = 0, Struct = 1, Union = 2 };
+enum ImportedEnityAttributeEncoding {
+ ImportedModule = 0,
+ ImportedDeclaration = 1
+};
+
enum SourceLanguage {
Unknown = 0,
ESSL = 1,
@@ -77,10 +281,55 @@ enum SourceLanguage {
NZSL = 9,
WGSL = 10,
Slang = 11,
- Zig = 12
+ Zig = 12,
+ CPP = 13
+};
+
+enum QualifierTypeAttributeEncoding {
+ ConstType = 0,
+ VolatileType = 1,
+ RestrictType = 2,
+ AtomicType = 3
+};
+
+enum Flag {
+ FlagIsProtected = 1 << 0,
+ FlagIsPrivate = 1 << 1,
+ FlagIsPublic = FlagIsPrivate | FlagIsProtected,
+ FlagAccess = FlagIsPublic,
+ FlagIsLocal = 1 << 2,
+ FlagIsDefinition = 1 << 3,
+ FlagIsFwdDecl = 1 << 4,
+ FlagIsArtificial = 1 << 5,
+ FlagIsExplicit = 1 << 6,
+ FlagIsPrototyped = 1 << 7,
+ FlagIsObjectPointer = 1 << 8,
+ FlagIsStaticMember = 1 << 9,
+ FlagIsIndirectVariable = 1 << 10,
+ FlagIsLValueReference = 1 << 11,
+ FlagIsRValueReference = 1 << 12,
+ FlagIsOptimized = 1 << 13,
+ FlagIsEnumClass = 1 << 14,
+ FlagTypePassByValue = 1 << 15,
+ FlagTypePassByReference = 1 << 16,
+ FlagUnknownPhysicalLayout = 1 << 17,
+ FlagBitField = 1 << 18
};
-bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
+template <typename T, typename Container>
+Register findRegisterFromMap(const T *DIType, const Container &RegPairs,
+ Register DefaultReg = Register()) {
+ if (!DIType)
+ return DefaultReg;
+ for (const auto &[DefinedType, Reg] : RegPairs) {
+ if (DefinedType == DIType)
+ return Reg;
+ }
+ return DefaultReg;
+}
+
+bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF,
+ SPIRVCodeGenContext &Ctx) {
// If this MachineFunction doesn't have any BB repeat procedure
// for the next
if (MF.begin() == MF.end()) {
@@ -88,16 +337,17 @@ bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
return false;
}
- // Required variables to get from metadata search
- LLVMContext *Context;
+ [[maybe_unused]] LLVMContext *Context;
SmallVector<SmallString<128>> FilePaths;
SmallVector<int64_t> LLVMSourceLanguages;
int64_t DwarfVersion = 0;
int64_t DebugInfoVersion = 0;
- SmallPtrSet<DIBasicType *, 12> BasicTypes;
- SmallPtrSet<DIDerivedType *, 12> PointerDerivedTypes;
- // Searching through the Module metadata to find nescessary
- // information like DwarfVersion or SourceLanguage
+ SmallString<128> BuildIdentifier;
+ SmallString<128> BuildStoragePath;
+ Register DebugCompUnitResIdReg;
+ Register DebugSourceResIdReg;
+ DebugInfoCollector Collector;
+
{
const MachineModuleInfo &MMI =
getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
@@ -108,7 +358,25 @@ bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
return false;
for (const auto *Op : DbgCu->operands()) {
if (const auto *CompileUnit = dyn_cast<DICompileUnit>(Op)) {
+ if (CompileUnit->getDWOId())
+ BuildIdentifier = std::to_string(CompileUnit->getDWOId());
+ if (!CompileUnit->getSplitDebugFilename().empty())
+ BuildStoragePath = CompileUnit->getSplitDebugFilename();
+
+ for (auto *GVE : CompileUnit->getGlobalVariables()) {
+ if (auto *DIGV = dyn_cast<DIGlobalVariable>(GVE->getVariable())) {
+ extractTypeMetadata(DIGV->getType(), Collector);
+ }
+ }
+ for (const auto *IE : CompileUnit->getImportedEntities()) {
+ if (const auto *Imported = dyn_cast<DIImportedEntity>(IE)) {
+ Collector.ImportedEntities.push_back(Imported);
+ }
+ }
+
DIFile *File = CompileUnit->getFile();
+ Collector.CUFileNodes.push_back(File);
+ Collector.CUNodes.push_back(CompileUnit);
FilePaths.emplace_back();
sys::path::append(FilePaths.back(), File->getDirectory(),
File->getFilename());
@@ -135,25 +403,25 @@ bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
// This traversal is the only supported way to access
// instruction related DI metadata like DIBasicType
for (auto &F : *M) {
+ if (DISubprogram *SP = F.getSubprogram()) {
+ Collector.SubPrograms.insert(SP);
+ if (auto *SubType = dyn_cast<DISubroutineType>(SP->getType()))
+ Collector.SubRoutineTypes.insert(SubType);
+ }
for (auto &BB : F) {
for (auto &I : BB) {
for (DbgVariableRecord &DVR : filterDbgVars(I.getDbgRecordRange())) {
- DILocalVariable *LocalVariable = DVR.getVariable();
- if (auto *BasicType =
- dyn_cast<DIBasicType>(LocalVariable->getType())) {
- BasicTypes.insert(BasicType);
- } else if (auto *DerivedType =
- dyn_cast<DIDerivedType>(LocalVariable->getType())) {
- if (DerivedType->getTag() == dwarf::DW_TAG_pointer_type) {
- PointerDerivedTypes.insert(DerivedType);
- // DIBasicType can be unreachable from DbgRecord and only
- // pointed on from other DI types
- // DerivedType->getBaseType is null when pointer
- // is representing a void type
- if (auto *BT = dyn_cast_or_null<DIBasicType>(
- DerivedType->getBaseType()))
- BasicTypes.insert(BT);
- }
+ if (DILocalVariable *LocalVariable = DVR.getVariable())
+ extractTypeMetadata(LocalVariable->getType(), Collector);
+ }
+ if (const DebugLoc &DL = I.getDebugLoc()) {
+ if (const DILocation *Loc = DL.get()) {
+ DIScope *Scope = Loc->getScope();
+ if (auto *SP = dyn_cast<DISubprogram>(Scope))
+ Collector.SubPrograms.insert(SP);
+ else if (isa<DILexicalBlock>(Scope) ||
+ isa<DILexicalBlockFile>(Scope))
+ Collector.LexicalScopes.insert(Scope);
}
}
}
@@ -163,197 +431,1547 @@ bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
// NonSemantic.Shader.DebugInfo.100 global DI instruction emitting
{
// Required LLVM variables for emitting logic
+
+ const Register DwarfVersionReg = Ctx.GR->buildConstantInt(
+ DwarfVersion, Ctx.MIRBuilder, Ctx.I32Ty, false);
+
+ const Register DebugInfoVersionReg = Ctx.GR->buildConstantInt(
+ DebugInfoVersion, Ctx.MIRBuilder, Ctx.I32Ty, false);
+
+ for (unsigned Idx = 0; Idx < LLVMSourceLanguages.size(); ++Idx) {
+ emitSingleCompilationUnit(
+ FilePaths[Idx], LLVMSourceLanguages[Idx], Ctx, DebugInfoVersionReg,
+ DwarfVersionReg, DebugSourceResIdReg, DebugCompUnitResIdRe...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/169643
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