[llvm] [RISCV]: Implemented softening of `FCANONICALIZE` (PR #169234)

[Kevin Per via llvm-commits]

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@@ -10,6 +11,42 @@ declare float @llvm.fcanonicalize.f32(float)
 declare double @llvm.fcanonicalize.f64(double)
 
 define half @fcanonicalize_f16(half %x) {
+; RV64-SOFT-LABEL: fcanonicalize_f16:
+; RV64-SOFT:       # %bb.0:
+; RV64-SOFT-NEXT:    addi sp, sp, -16
+; RV64-SOFT-NEXT:    .cfi_def_cfa_offset 16
+; RV64-SOFT-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
+; RV64-SOFT-NEXT:    .cfi_offset ra, -8
+; RV64-SOFT-NEXT:    slli a0, a0, 48
+; RV64-SOFT-NEXT:    srli a0, a0, 48
+; RV64-SOFT-NEXT:    call __extendhfsf2
----------------
kper wrote:

It looks to me that the sign is preserved, so I suppose it's fine to drop the minnum

https://github.com/llvm/llvm-project/blob/a832a5222e489298337fbb5876f8dcaf072c5cca/compiler-rt/test/builtins/Unit/extendhfsf2_test.c#L42
and
https://github.com/llvm/llvm-project/blob/a832a5222e489298337fbb5876f8dcaf072c5cca/compiler-rt/test/builtins/Unit/extendhfsf2_test.c#L47

---

```
Legalizing node: t5: f16 = fcanonicalize nnan t4
Analyzing result type: f16
Soft promote half result 0: t5: f16 = fcanonicalize nnan t4
Creating new node: t11: f32 = fp16_to_fp nnan t3
Creating new node: t12: f32 = fcanonicalize nnan t11
Creating new node: t13: i16 = fp_to_fp16 nnan t12
```

This can be done in the DAG Combiner, right?

https://github.com/llvm/llvm-project/pull/169234