[llvm] 4e7c65e - [RISCV] Don't add duplicate Zilsd hints. (#169554)
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Tue Nov 25 21:15:04 PST 2025
Author: Craig Topper
Date: 2025-11-25T21:15:00-08:00
New Revision: 4e7c65e85f47443ab3af729e5cf8e693081abb87
URL: https://github.com/llvm/llvm-project/commit/4e7c65e85f47443ab3af729e5cf8e693081abb87
DIFF: https://github.com/llvm/llvm-project/commit/4e7c65e85f47443ab3af729e5cf8e693081abb87.diff
LOG: [RISCV] Don't add duplicate Zilsd hints. (#169554)
This matches what ARM does. I'm not sure if there are any bad effects
from the duplicate hints. I have seen the duplicates hints in the debug
output and confirmed this removes them.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index a5aef4bea46ab..d802d19a0edcb 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -869,6 +869,7 @@ bool RISCVRegisterInfo::getRegAllocationHints(
unsigned HintType = Hint.first;
Register Partner = Hint.second;
+ MCRegister TargetReg;
if (HintType == RISCVRI::RegPairEven || HintType == RISCVRI::RegPairOdd) {
// Check if we want the even or odd register of a consecutive pair
bool WantOdd = (HintType == RISCVRI::RegPairOdd);
@@ -877,7 +878,7 @@ bool RISCVRegisterInfo::getRegAllocationHints(
if (Partner.isVirtual() && VRM && VRM->hasPhys(Partner)) {
MCRegister PartnerPhys = VRM->getPhys(Partner);
// Calculate the exact register we need for consecutive pairing
- MCRegister TargetReg = PartnerPhys.id() + (WantOdd ? 1 : -1);
+ TargetReg = PartnerPhys.id() + (WantOdd ? 1 : -1);
// Verify it's valid and available
if (RISCV::GPRRegClass.contains(TargetReg) &&
@@ -888,7 +889,8 @@ bool RISCVRegisterInfo::getRegAllocationHints(
// Second priority: Try to find consecutive register pairs in the allocation
// order
for (MCPhysReg PhysReg : Order) {
- if (!PhysReg)
+ // Don't add the hint if we already added above.
+ if (TargetReg == PhysReg)
continue;
unsigned RegNum = getEncodingValue(PhysReg);
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