[llvm] eab23e1 - [RISCV] Don't add Zilsd pairing hints if other part of the pair is reserved. (#169538)

via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 25 10:58:49 PST 2025


Author: Craig Topper
Date: 2025-11-25T10:58:45-08:00
New Revision: eab23e199aef18c2052c08171129633233ab98f5

URL: https://github.com/llvm/llvm-project/commit/eab23e199aef18c2052c08171129633233ab98f5
DIFF: https://github.com/llvm/llvm-project/commit/eab23e199aef18c2052c08171129633233ab98f5.diff

LOG: [RISCV] Don't add Zilsd pairing hints if other part of the pair is reserved. (#169538)

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index 263d6a1fc2220..a5aef4bea46ab 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -895,11 +895,9 @@ bool RISCVRegisterInfo::getRegAllocationHints(
       // Check if this register matches the even/odd requirement
       bool IsOdd = (RegNum % 2 != 0);
 
-      // Verify the pair register exists and is in the same register class
-      // TODO: Skip unallocatable registers: we need to prevent any of odd/even
-      // to be reserved, so if we need odd, we need to check if corresponding
-      // even is preserved, vice versa.
-      if ((WantOdd && IsOdd) || (!WantOdd && !IsOdd))
+      // Don't provide hints that are paired to a reserved register.
+      MCRegister Paired = PhysReg + (IsOdd ? -1 : 1);
+      if (WantOdd == IsOdd && !MRI->isReserved(Paired))
         Hints.push_back(PhysReg);
     }
   }


        


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