[llvm] [LV][NFC] Remove remaining uses of undef in tests (PR #169357)
David Sherwood via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 25 06:46:18 PST 2025
https://github.com/david-arm updated https://github.com/llvm/llvm-project/pull/169357
>From e19d815116a8b0df6bbd7996cf3c19b9629d7b32 Mon Sep 17 00:00:00 2001
From: David Sherwood <david.sherwood at arm.com>
Date: Mon, 24 Nov 2025 16:30:28 +0000
Subject: [PATCH 1/2] [LV][NFC] Remove remaining uses of undef in tests
Split off from PR #163525, this standalone patch replaces almost
all the remaining cases where undef is used as value in loop
vectoriser tests. This will reduce the likelihood of contributors
hitting the `undef deprecator` warning in github.
NOTE: The remaining use of undef in iv_outside_user.ll will be
fixed in a separate PR.
I've removed the test stride_undef from version-mem-access.ll,
since there is already a stride_poison test.
---
.../Transforms/LoopVectorize/X86/pr39160.ll | 8 ++--
.../Transforms/LoopVectorize/if-conversion.ll | 36 ++++++++++-----
.../LoopVectorize/incorrect-dom-info.ll | 2 +-
.../LoopVectorize/iv_outside_user.ll | 17 +++----
.../Transforms/LoopVectorize/lcssa-crashes.ll | 26 +++++------
.../Transforms/LoopVectorize/nsw-crash.ll | 4 +-
.../LoopVectorize/scev-exitlim-crash.ll | 2 +-
.../Transforms/LoopVectorize/value-ptr-bug.ll | 4 +-
.../LoopVectorize/vector-to-scalar-cast.ll | 4 +-
.../LoopVectorize/version-mem-access.ll | 46 -------------------
10 files changed, 59 insertions(+), 90 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/pr39160.ll b/llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
index 878d288b918e4..d640984683ec0 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
@@ -13,7 +13,7 @@ bb:
br label %bb2
bb2: ; preds = %bb2, %bb
- %tmp4 = icmp slt i32 undef, 0
+ %tmp4 = icmp slt i32 poison, 0
br i1 %tmp4, label %bb2, label %bb5
bb5: ; preds = %bb2
@@ -23,8 +23,8 @@ bb18: ; preds = %bb33
ret void
bb19: ; preds = %bb36, %bb5
- %tmp21 = phi i64 [ undef, %bb36 ], [ 2, %bb5 ]
- %tmp22 = phi i32 [ %tmp65, %bb36 ], [ undef, %bb5 ]
+ %tmp21 = phi i64 [ poison, %bb36 ], [ 2, %bb5 ]
+ %tmp22 = phi i32 [ %tmp65, %bb36 ], [ poison, %bb5 ]
br label %bb50
bb33: ; preds = %bb62
@@ -48,7 +48,7 @@ bb50: ; preds = %bb50, %bb19
%tmp54 = add i32 %tmp52, 12
%tmp55 = add i32 %tmp52, 13
%tmp56 = add nuw nsw i64 %tmp53, 1
- %tmp58 = icmp ult i64 %tmp53, undef
+ %tmp58 = icmp ult i64 %tmp53, poison
br i1 %tmp58, label %bb50, label %bb46
bb59: ; preds = %bb46
diff --git a/llvm/test/Transforms/LoopVectorize/if-conversion.ll b/llvm/test/Transforms/LoopVectorize/if-conversion.ll
index a88a9b1466149..350c267445e54 100644
--- a/llvm/test/Transforms/LoopVectorize/if-conversion.ll
+++ b/llvm/test/Transforms/LoopVectorize/if-conversion.ll
@@ -237,22 +237,36 @@ for.end: ; preds = %for.inc, %entry
; Handle PHI with single incoming value having a full mask.
; PR34523
-; NOTE: Changing PHI inputs from undef to poison leads to change in
-; behaviour of the test. Left as undef for now.
-define void @PR34523() {
-; CHECK-LABEL: define void @PR34523() {
-; CHECK-NEXT: [[BB1:.*:]]
-; CHECK-NEXT: br i1 true, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+define void @PR34523(ptr %p, i16 %val) {
+; CHECK-LABEL: define void @PR34523(
+; CHECK-SAME: ptr [[P:%.*]], i16 [[VAL:%.*]]) {
+; CHECK-NEXT: [[BB1:.*]]:
+; CHECK-NEXT: [[TMP0:%.*]] = add i16 [[VAL]], 1
+; CHECK-NEXT: [[SMAX:%.*]] = call i16 @llvm.smax.i16(i16 [[TMP0]], i16 2)
+; CHECK-NEXT: [[TMP1:%.*]] = xor i16 [[VAL]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = add i16 [[SMAX]], [[TMP1]]
+; CHECK-NEXT: [[TMP3:%.*]] = zext i16 [[TMP2]] to i32
+; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i32 [[TMP3]], 1
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i16 [[TMP2]], 3
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[TMP4]], 131068
+; CHECK-NEXT: [[DOTCAST:%.*]] = trunc i32 [[N_VEC]] to i16
+; CHECK-NEXT: [[TMP5:%.*]] = add i16 [[VAL]], [[DOTCAST]]
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: br i1 poison, label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
+; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br i1 poison, label %[[BB5:.*]], label %[[SCALAR_PH]]
+; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP4]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[CMP_N]], label %[[BB5:.*]], label %[[SCALAR_PH]]
; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i16 [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ [[VAL]], %[[BB1]] ]
; CHECK-NEXT: br label %[[BB2:.*]]
; CHECK: [[BB2]]:
-; CHECK-NEXT: [[I:%.*]] = phi i16 [ undef, %[[SCALAR_PH]] ], [ [[_TMP2:%.*]], %[[BB4:.*]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i16 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[_TMP2:%.*]], %[[BB4:.*]] ]
; CHECK-NEXT: br label %[[BB3:.*]]
; CHECK: [[BB3]]:
; CHECK-NEXT: br label %[[BB4]]
@@ -267,11 +281,11 @@ bb1:
br label %bb2
bb2: ; preds = %bb4, %bb1
- %i = phi i16 [ undef, %bb1 ], [ %_tmp2, %bb4 ]
+ %i = phi i16 [ %val, %bb1 ], [ %_tmp2, %bb4 ]
br label %bb3
bb3: ; preds = %bb2
- %_tmp1 = phi ptr [ undef, %bb2 ]
+ %_tmp1 = phi ptr [ %p, %bb2 ]
br label %bb4
bb4: ; preds = %bb3
diff --git a/llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll b/llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
index 34873319176d1..df8ade647d968 100644
--- a/llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
+++ b/llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
@@ -58,7 +58,7 @@ thread-pre-split.loopexit: ; preds = %11, %.thread-pre-sp
br i1 %arg, label %11, label %22
; <label>:11 ; preds = %.lr.ph21
- %12 = getelementptr inbounds [0 x i8], ptr @PL_utf8skip, i64 0, i64 undef
+ %12 = getelementptr inbounds [0 x i8], ptr @PL_utf8skip, i64 0, i64 0
%13 = load i8, ptr %12, align 1
%14 = zext i8 %13 to i64
%15 = icmp ugt i64 %14, %10
diff --git a/llvm/test/Transforms/LoopVectorize/iv_outside_user.ll b/llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
index 162803a377bc0..4717521980966 100644
--- a/llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
+++ b/llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
@@ -262,15 +262,16 @@ for.end:
ret i32 %phi
}
-define void @PR30742() {
-; CHECK-LABEL: define void @PR30742() {
+define void @PR30742(ptr %p) {
+; CHECK-LABEL: define void @PR30742(
+; CHECK-SAME: ptr [[P:%.*]]) {
; CHECK-NEXT: [[BB0:.*:]]
; CHECK-NEXT: br label %[[BB1:.*]]
; CHECK: [[BB1_LOOPEXIT:.*]]:
; CHECK-NEXT: br label %[[BB1]]
; CHECK: [[BB1]]:
-; CHECK-NEXT: [[TMP00:%.*]] = load i32, ptr undef, align 16
-; CHECK-NEXT: [[TMP01:%.*]] = sub i32 [[TMP00]], undef
+; CHECK-NEXT: [[TMP00:%.*]] = load i32, ptr [[P]], align 16
+; CHECK-NEXT: [[TMP01:%.*]] = sub i32 [[TMP00]], 3
; CHECK-NEXT: [[TMP02:%.*]] = icmp slt i32 [[TMP01]], 1
; CHECK-NEXT: [[TMP03:%.*]] = select i1 [[TMP02]], i32 1, i32 [[TMP01]]
; CHECK-NEXT: [[TMP04:%.*]] = add nsw i32 [[TMP03]], -7
@@ -307,7 +308,7 @@ define void @PR30742() {
; CHECK-NEXT: br i1 [[TMP07]], label %[[BB2]], label %[[BB3]], {{!llvm.loop ![0-9]+}}
; CHECK: [[BB3]]:
; CHECK-NEXT: [[TMP08:%.*]] = phi i32 [ [[TMP05]], %[[BB2]] ], [ [[IND_ESCAPE]], %[[MIDDLE_BLOCK10]] ]
-; CHECK-NEXT: [[TMP09:%.*]] = sub i32 [[TMP00]], undef
+; CHECK-NEXT: [[TMP09:%.*]] = sub i32 [[TMP00]], 4
; CHECK-NEXT: [[TMP10:%.*]] = icmp slt i32 [[TMP09]], 1
; CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i32 1, i32 [[TMP09]]
; CHECK-NEXT: [[TMP12:%.*]] = add nsw i32 [[TMP11]], -7
@@ -346,8 +347,8 @@ BB0:
br label %BB1
BB1:
- %tmp00 = load i32, ptr undef, align 16
- %tmp01 = sub i32 %tmp00, undef
+ %tmp00 = load i32, ptr %p, align 16
+ %tmp01 = sub i32 %tmp00, 3
%tmp02 = icmp slt i32 %tmp01, 1
%tmp03 = select i1 %tmp02, i32 1, i32 %tmp01
%tmp04 = add nsw i32 %tmp03, -7
@@ -361,7 +362,7 @@ BB2:
BB3:
%tmp08 = phi i32 [ %tmp05, %BB2 ]
- %tmp09 = sub i32 %tmp00, undef
+ %tmp09 = sub i32 %tmp00, 4
%tmp10 = icmp slt i32 %tmp09, 1
%tmp11 = select i1 %tmp10, i32 1, i32 %tmp09
%tmp11.inc = add nsw i32 %tmp11, -7
diff --git a/llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll b/llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
index 6265336d1e45e..e2372b00eb7fb 100644
--- a/llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
+++ b/llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
@@ -7,18 +7,18 @@ define void @test() {
; CHECK-LABEL: @test(
; CHECK-NEXT: br label [[FOR_BODY_LR_PH_I_I_I:%.*]]
; CHECK: for.body.lr.ph.i.i.i:
-; CHECK-NEXT: br i1 true, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
+; CHECK-NEXT: br i1 poison, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
; CHECK: vector.ph:
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], poison
; CHECK-NEXT: br i1 [[TMP1]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK: middle.block:
-; CHECK-NEXT: br i1 false, label [[FOR_END_I_I_I:%.*]], label [[SCALAR_PH]]
+; CHECK-NEXT: br i1 poison, label [[FOR_END_I_I_I:%.*]], label [[SCALAR_PH]]
; CHECK: scalar.ph:
-; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_LR_PH_I_I_I]] ]
+; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ poison, [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_LR_PH_I_I_I]] ]
; CHECK-NEXT: br label [[FOR_BODY_I_I_I:%.*]]
; CHECK: for.body.i.i.i:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC_I_I_I:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
@@ -26,10 +26,10 @@ define void @test() {
; CHECK: for.inc.i.i.i:
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], undef
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], poison
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY_I_I_I]], label [[FOR_END_I_I_I]], !llvm.loop [[LOOP3:![0-9]+]]
; CHECK: for.end.i.i.i:
-; CHECK-NEXT: [[LCSSA:%.*]] = phi ptr [ undef, [[FOR_INC_I_I_I]] ], [ undef, [[MIDDLE_BLOCK]] ]
+; CHECK-NEXT: [[LCSSA:%.*]] = phi ptr [ poison, [[FOR_INC_I_I_I]] ], [ poison, [[MIDDLE_BLOCK]] ]
; CHECK-NEXT: unreachable
;
br label %for.body.lr.ph.i.i.i
@@ -44,11 +44,11 @@ for.body.i.i.i:
for.inc.i.i.i:
%indvars.iv.next = add i64 %indvars.iv, 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
- %exitcond = icmp ne i32 %lftr.wideiv, undef
+ %exitcond = icmp ne i32 %lftr.wideiv, poison
br i1 %exitcond, label %for.body.i.i.i, label %for.end.i.i.i
for.end.i.i.i:
- %lcssa = phi ptr [ undef, %for.inc.i.i.i ]
+ %lcssa = phi ptr [ poison, %for.inc.i.i.i ]
unreachable
}
@@ -56,7 +56,7 @@ for.end.i.i.i:
define void @test2(ptr %x) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: indirectbr ptr [[X:%.*]], [label [[L0:%.*]], label %L1]
+; CHECK-NEXT: indirectbr ptr [[X:%.*]], [label [[L0:%.*]], label [[L1:%.*]]]
; CHECK: L0:
; CHECK-NEXT: br label [[L0]]
; CHECK: L1:
@@ -76,14 +76,14 @@ L1:
define void @test3() {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[ADD41:%.*]] = add i32 undef, undef
+; CHECK-NEXT: [[ADD41:%.*]] = add i32 poison, poison
; CHECK-NEXT: [[IDXPROM4736:%.*]] = zext i32 [[ADD41]] to i64
; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
; CHECK: while.body:
; CHECK-NEXT: [[IDXPROM4738:%.*]] = phi i64 [ [[IDXPROM47:%.*]], [[WHILE_BODY]] ], [ [[IDXPROM4736]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[POS_337:%.*]] = phi i32 [ [[INC46:%.*]], [[WHILE_BODY]] ], [ [[ADD41]], [[ENTRY]] ]
; CHECK-NEXT: [[INC46]] = add i32 [[POS_337]], 1
-; CHECK-NEXT: [[ARRAYIDX48:%.*]] = getelementptr inbounds [1024 x i8], ptr undef, i64 0, i64 [[IDXPROM4738]]
+; CHECK-NEXT: [[ARRAYIDX48:%.*]] = getelementptr inbounds [1024 x i8], ptr poison, i64 0, i64 [[IDXPROM4738]]
; CHECK-NEXT: store i8 0, ptr [[ARRAYIDX48]], align 1
; CHECK-NEXT: [[AND43:%.*]] = and i32 [[INC46]], 3
; CHECK-NEXT: [[CMP44:%.*]] = icmp eq i32 [[AND43]], 0
@@ -95,7 +95,7 @@ define void @test3() {
; CHECK-NEXT: ret void
;
entry:
- %add41 = add i32 undef, undef
+ %add41 = add i32 poison, poison
%idxprom4736 = zext i32 %add41 to i64
br label %while.body
@@ -103,7 +103,7 @@ while.body:
%idxprom4738 = phi i64 [ %idxprom47, %while.body ], [ %idxprom4736, %entry ]
%pos.337 = phi i32 [ %inc46, %while.body ], [ %add41, %entry ]
%inc46 = add i32 %pos.337, 1
- %arrayidx48 = getelementptr inbounds [1024 x i8], ptr undef, i64 0, i64 %idxprom4738
+ %arrayidx48 = getelementptr inbounds [1024 x i8], ptr poison, i64 0, i64 %idxprom4738
store i8 0, ptr %arrayidx48, align 1
%and43 = and i32 %inc46, 3
%cmp44 = icmp eq i32 %and43, 0
diff --git a/llvm/test/Transforms/LoopVectorize/nsw-crash.ll b/llvm/test/Transforms/LoopVectorize/nsw-crash.ll
index d87d9b155db1c..348662a21f603 100644
--- a/llvm/test/Transforms/LoopVectorize/nsw-crash.ll
+++ b/llvm/test/Transforms/LoopVectorize/nsw-crash.ll
@@ -13,8 +13,8 @@ while.body.lr.ph:
while.body:
%it.sroa.0.091 = phi ptr [ %p, %while.body.lr.ph ], [ %incdec.ptr.i, %while.body ]
%incdec.ptr.i = getelementptr inbounds i32, ptr %it.sroa.0.091, i64 1
- %inc32 = add i32 undef, 1 ; <------------- Make sure we don't set NSW flags to the undef.
- %cmp.i11 = icmp eq ptr %incdec.ptr.i, undef
+ %inc32 = add i32 poison, 1 ; <------------- Make sure we don't set NSW flags to the poison.
+ %cmp.i11 = icmp eq ptr %incdec.ptr.i, poison
br i1 %cmp.i11, label %while.end, label %while.body
while.end:
diff --git a/llvm/test/Transforms/LoopVectorize/scev-exitlim-crash.ll b/llvm/test/Transforms/LoopVectorize/scev-exitlim-crash.ll
index 137e098b91260..490576a69d276 100644
--- a/llvm/test/Transforms/LoopVectorize/scev-exitlim-crash.ll
+++ b/llvm/test/Transforms/LoopVectorize/scev-exitlim-crash.ll
@@ -18,7 +18,7 @@ entry:
for.cond: ; preds = %for.cond, %entry
%i.0 = phi i32 [ poison, %entry ], [ %inc, %for.cond ]
%cmp = icmp slt i32 %i.0, 0
- %fsub = fsub double undef, undef
+ %fsub = fsub double 0.0e+00, 0.0e+00
%fadd = fadd double %fsub, 1.000000e+00
%call = tail call i32 @fn2(double %fadd) #2
%inc = add nsw i32 %i.0, 1
diff --git a/llvm/test/Transforms/LoopVectorize/value-ptr-bug.ll b/llvm/test/Transforms/LoopVectorize/value-ptr-bug.ll
index 6579e0e33b308..ca07e94acb7e5 100644
--- a/llvm/test/Transforms/LoopVectorize/value-ptr-bug.ll
+++ b/llvm/test/Transforms/LoopVectorize/value-ptr-bug.ll
@@ -5,12 +5,12 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; PR16073
; Because we were caching value pointers across a function call that could RAUW
-; we would generate an undefined value store below:
+; we would generate an poison value store below:
; SCEVExpander::expandCodeFor would change a value (the start value of an
; induction) that we cached in the induction variable list.
; CHECK-LABEL: @test_vh(
-; CHECK-NOT: store <4 x i8> undef
+; CHECK-NOT: store <4 x i8> poison
define void @test_vh(ptr %ptr265, ptr %ptr266, i32 %sub267) {
entry:
diff --git a/llvm/test/Transforms/LoopVectorize/vector-to-scalar-cast.ll b/llvm/test/Transforms/LoopVectorize/vector-to-scalar-cast.ll
index a6dcd4d1cfc11..333461e16bb14 100644
--- a/llvm/test/Transforms/LoopVectorize/vector-to-scalar-cast.ll
+++ b/llvm/test/Transforms/LoopVectorize/vector-to-scalar-cast.ll
@@ -7,7 +7,7 @@ define void @vector_to_scalar_cast(ptr %out) {
; CHECK-LABEL: define void @vector_to_scalar_cast(
; CHECK-SAME: ptr [[OUT:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: [[VEC0:%.*]] = insertelement <2 x i16> undef, i16 0, i64 0
+; CHECK-NEXT: [[VEC0:%.*]] = insertelement <2 x i16> poison, i16 0, i64 0
; CHECK-NEXT: [[VEC1:%.*]] = insertelement <2 x i16> [[VEC0]], i16 0, i64 1
; CHECK-NEXT: br label %[[LOOP:.*]]
; CHECK: [[LOOP]]:
@@ -22,7 +22,7 @@ define void @vector_to_scalar_cast(ptr %out) {
; CHECK-NEXT: ret void
;
entry:
- %vec0 = insertelement <2 x i16> undef, i16 0, i64 0
+ %vec0 = insertelement <2 x i16> poison, i16 0, i64 0
%vec1 = insertelement <2 x i16> %vec0, i16 0, i64 1
br label %loop
diff --git a/llvm/test/Transforms/LoopVectorize/version-mem-access.ll b/llvm/test/Transforms/LoopVectorize/version-mem-access.ll
index 91b30998bf611..8b9a526899041 100644
--- a/llvm/test/Transforms/LoopVectorize/version-mem-access.ll
+++ b/llvm/test/Transforms/LoopVectorize/version-mem-access.ll
@@ -169,49 +169,3 @@ loop:
exit:
ret void
}
-
-; Make sure we do not crash when the stride is undef.
-define void @stride_undef(ptr %dst) mustprogress {
-; CHECK-LABEL: define void @stride_undef(
-; CHECK-SAME: ptr [[DST:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 undef, i64 1)
-; CHECK-NEXT: [[TMP0:%.*]] = udiv i64 99, [[UMAX]]
-; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i64 [[TMP0]], 2
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP1]], 2
-; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]]
-; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[N_VEC]], undef
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], undef
-; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[OFFSET_IDX]], 0
-; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], undef
-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP3]]
-; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP4]]
-; CHECK-NEXT: store i8 0, ptr [[TMP5]], align 1
-; CHECK-NEXT: store i8 0, ptr [[TMP6]], align 1
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
-; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]]
-; CHECK-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH:.*]]
-; CHECK: [[SCALAR_PH]]:
-;
-entry:
- br label %loop
-
-loop:
- %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
- %gep.dst = getelementptr i8, ptr %dst, i64 %iv
- store i8 0, ptr %gep.dst, align 1
- %iv.next = add nuw nsw i64 %iv, undef
- %ec = icmp samesign ult i64 %iv, 100
- br i1 %ec, label %loop, label %exit
-
-exit:
- ret void
-}
>From 2cd4950ce1197f5820abb78cdd947f3edb8bc28d Mon Sep 17 00:00:00 2001
From: David Sherwood <david.sherwood at arm.com>
Date: Tue, 25 Nov 2025 14:45:27 +0000
Subject: [PATCH 2/2] Address review comments
---
.../Transforms/LoopVectorize/X86/pr39160.ll | 130 +++++++++---------
.../interleaved-accesses-uniform-load.ll | 39 +++++-
.../Transforms/LoopVectorize/lcssa-crashes.ll | 47 ++++---
3 files changed, 127 insertions(+), 89 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/pr39160.ll b/llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
index d640984683ec0..56d04e1192ec0 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
@@ -1,75 +1,71 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes=loop-vectorize -S < %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
target triple = "x86_64-unknown-linux-gnu"
; Make sure that we can compile the test without crash.
-define void @barney(ptr %dst, i1 %arg) {
-
-; CHECK-LABEL: @barney(
-; CHECK: middle.block:
-
-bb:
- br label %bb2
-
-bb2: ; preds = %bb2, %bb
- %tmp4 = icmp slt i32 poison, 0
- br i1 %tmp4, label %bb2, label %bb5
-
-bb5: ; preds = %bb2
- br label %bb19
-
-bb18: ; preds = %bb33
- ret void
-
-bb19: ; preds = %bb36, %bb5
- %tmp21 = phi i64 [ poison, %bb36 ], [ 2, %bb5 ]
- %tmp22 = phi i32 [ %tmp65, %bb36 ], [ poison, %bb5 ]
- br label %bb50
-
-bb33: ; preds = %bb62
- br i1 %arg, label %bb18, label %bb36
-
-bb36: ; preds = %bb33
- br label %bb19
-
-bb46: ; preds = %bb50
- br i1 %arg, label %bb48, label %bb59
-
-bb48: ; preds = %bb46
- %tmp49 = add i32 %tmp52, 14
- ret void
-
-bb50: ; preds = %bb50, %bb19
- %tmp52 = phi i32 [ %tmp55, %bb50 ], [ %tmp22, %bb19 ]
- %tmp53 = phi i64 [ %tmp56, %bb50 ], [ 1, %bb19 ]
- %gep = getelementptr inbounds i8, ptr %dst, i64 %tmp53
- store i8 1, ptr %gep
- %tmp54 = add i32 %tmp52, 12
- %tmp55 = add i32 %tmp52, 13
- %tmp56 = add nuw nsw i64 %tmp53, 1
- %tmp58 = icmp ult i64 %tmp53, poison
- br i1 %tmp58, label %bb50, label %bb46
-
-bb59: ; preds = %bb46
- br label %bb62
-
-bb62: ; preds = %bb68, %bb59
- %tmp63 = phi i32 [ %tmp65, %bb68 ], [ %tmp55, %bb59 ]
- %tmp64 = phi i64 [ %tmp66, %bb68 ], [ %tmp56, %bb59 ]
- %tmp65 = add i32 %tmp63, 13
- %tmp66 = add nuw nsw i64 %tmp64, 1
- %tmp67 = icmp ult i64 %tmp66, %tmp21
- br i1 %tmp67, label %bb68, label %bb33
-
-bb68: ; preds = %bb62
- br label %bb62
-}
define i32 @foo(ptr addrspace(1) %p) {
-
-; CHECK-LABEL: foo
-; CHECK: middle.block:
+; CHECK-LABEL: define i32 @foo(
+; CHECK-SAME: ptr addrspace(1) [[P:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[OUTER:.*]]
+; CHECK: [[OUTER]]:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i32 [ [[INDVAR_NEXT:%.*]], %[[OUTER_LATCH:.*]] ], [ 0, %[[ENTRY]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 2, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[OUTER_LATCH]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDVAR]], 1
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP0]], 8
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], 8
+; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[N_MOD_VF]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i32 1, [[N_VEC]]
+; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[N_VEC]], 2
+; CHECK-NEXT: [[TMP3:%.*]] = add i32 6, [[TMP2]]
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP4:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 6, i32 8, i32 10, i32 12>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[STEP_ADD:%.*]] = add <4 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP4]] = or <4 x i32> [[VEC_PHI]], [[VEC_IND]]
+; CHECK-NEXT: [[TMP5]] = or <4 x i32> [[VEC_PHI1]], [[STEP_ADD]]
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[STEP_ADD]], splat (i32 8)
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: [[BIN_RDX:%.*]] = or <4 x i32> [[TMP5]], [[TMP4]]
+; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[BIN_RDX]])
+; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP0]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[CMP_N]], label %[[OUTER_LATCH]], label %[[SCALAR_PH]]
+; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP7]], %[[MIDDLE_BLOCK]] ], [ 0, %[[OUTER]] ]
+; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[TMP1]], %[[MIDDLE_BLOCK]] ], [ 1, %[[OUTER]] ]
+; CHECK-NEXT: [[BC_RESUME_VAL2:%.*]] = phi i32 [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ 6, %[[OUTER]] ]
+; CHECK-NEXT: br label %[[INNER:.*]]
+; CHECK: [[INNER]]:
+; CHECK-NEXT: [[TMP8:%.*]] = phi i32 [ [[TMP10:%.*]], %[[INNER]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]
+; CHECK-NEXT: [[A:%.*]] = phi i32 [ [[TMP11:%.*]], %[[INNER]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
+; CHECK-NEXT: [[B:%.*]] = phi i32 [ [[TMP9:%.*]], %[[INNER]] ], [ [[BC_RESUME_VAL2]], %[[SCALAR_PH]] ]
+; CHECK-NEXT: [[TMP9]] = add i32 [[B]], 2
+; CHECK-NEXT: [[TMP10]] = or i32 [[TMP8]], [[B]]
+; CHECK-NEXT: [[TMP11]] = add nuw nsw i32 [[A]], 1
+; CHECK-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
+; CHECK-NEXT: [[TMP13:%.*]] = icmp ugt i64 [[IV]], [[TMP12]]
+; CHECK-NEXT: br i1 [[TMP13]], label %[[INNER]], label %[[OUTER_LATCH]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK: [[OUTER_LATCH]]:
+; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ [[TMP10]], %[[INNER]] ], [ [[TMP7]], %[[MIDDLE_BLOCK]] ]
+; CHECK-NEXT: store atomic i32 [[DOTLCSSA]], ptr addrspace(1) [[P]] unordered, align 4
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[TMP14:%.*]] = icmp ugt i64 [[IV]], 63
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i32 [[INDVAR]], 1
+; CHECK-NEXT: br i1 [[TMP14]], label %[[EXIT:.*]], label %[[OUTER]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret i32 0
+;
entry:
br label %outer
@@ -98,3 +94,9 @@ outer_latch: ; preds = %inner
exit: ; preds = %outer_latch
ret i32 0
}
+;.
+; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
+;.
diff --git a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll
index 081dcd831a1be..6558b00009b3a 100644
--- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll
+++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll
@@ -1,4 +1,6 @@
-; RUN: opt -S -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -enable-interleaved-mem-accesses=true < %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 \
+; RUN: -enable-interleaved-mem-accesses=true < %s | FileCheck %s
; Make sure the vectorizer can handle this loop: The strided load is only used
; by the loop's exit condition, which is not vectorized, and is therefore
@@ -29,10 +31,31 @@
%0 zeroinitializer], align 8
define dso_local void @test_dead_load(i32 %arg) {
-; CHECK-LABEL: @test_dead_load(
-; CHECK: vector.body:
-; CHECK: %wide.vec = load <16 x i32>, ptr %3, align 8
-; CHECK: %strided.vec = shufflevector <16 x i32> %wide.vec, <16 x i32> undef, <4 x i32> <i32 0, i32 4, i32 8, i32 12>
+; CHECK-LABEL: define dso_local void @test_dead_load(
+; CHECK-SAME: i32 [[ARG:%.*]]) {
+; CHECK-NEXT: [[BB1:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[INDEX_NEXT]], 52
+; CHECK-NEXT: br i1 [[TMP0]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[SCALAR_PH:.*]]
+; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: br label %[[BB2:.*]]
+; CHECK: [[BB2]]:
+; CHECK-NEXT: [[TMP:%.*]] = phi ptr [ [[TMP6:%.*]], %[[BB2]] ], [ getelementptr (i8, ptr @[[GLOB0:[0-9]+]], i64 832), %[[SCALAR_PH]] ]
+; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[TMP0]], ptr [[TMP]], i64 0, i32 1
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 8
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 258
+; CHECK-NEXT: [[TMP6]] = getelementptr inbounds [[TMP0]], ptr [[TMP]], i64 1
+; CHECK-NEXT: br i1 [[TMP5]], label %[[BB65:.*]], label %[[BB2]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK: [[BB65]]:
+; CHECK-NEXT: unreachable
+;
bb1:
br label %bb2
@@ -47,3 +70,9 @@ bb2:
bb65:
unreachable
}
+;.
+; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
+;.
diff --git a/llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll b/llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
index e2372b00eb7fb..37142c19a09c9 100644
--- a/llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
+++ b/llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
@@ -3,22 +3,29 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
-define void @test() {
+define void @test(i32 %tc, ptr %p) {
; CHECK-LABEL: @test(
; CHECK-NEXT: br label [[FOR_BODY_LR_PH_I_I_I:%.*]]
; CHECK: for.body.lr.ph.i.i.i:
-; CHECK-NEXT: br i1 poison, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TC:%.*]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
+; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 4
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
; CHECK: vector.ph:
+; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 4
+; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], poison
-; CHECK-NEXT: br i1 [[TMP1]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK: middle.block:
-; CHECK-NEXT: br i1 poison, label [[FOR_END_I_I_I:%.*]], label [[SCALAR_PH]]
+; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END_I_I_I:%.*]], label [[SCALAR_PH]]
; CHECK: scalar.ph:
-; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ poison, [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_LR_PH_I_I_I]] ]
+; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_LR_PH_I_I_I]] ]
; CHECK-NEXT: br label [[FOR_BODY_I_I_I:%.*]]
; CHECK: for.body.i.i.i:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC_I_I_I:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
@@ -26,10 +33,10 @@ define void @test() {
; CHECK: for.inc.i.i.i:
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], poison
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[TC]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY_I_I_I]], label [[FOR_END_I_I_I]], !llvm.loop [[LOOP3:![0-9]+]]
; CHECK: for.end.i.i.i:
-; CHECK-NEXT: [[LCSSA:%.*]] = phi ptr [ poison, [[FOR_INC_I_I_I]] ], [ poison, [[MIDDLE_BLOCK]] ]
+; CHECK-NEXT: [[LCSSA:%.*]] = phi ptr [ [[P:%.*]], [[FOR_INC_I_I_I]] ], [ [[P]], [[MIDDLE_BLOCK]] ]
; CHECK-NEXT: unreachable
;
br label %for.body.lr.ph.i.i.i
@@ -44,11 +51,11 @@ for.body.i.i.i:
for.inc.i.i.i:
%indvars.iv.next = add i64 %indvars.iv, 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
- %exitcond = icmp ne i32 %lftr.wideiv, poison
+ %exitcond = icmp ne i32 %lftr.wideiv, %tc
br i1 %exitcond, label %for.body.i.i.i, label %for.end.i.i.i
for.end.i.i.i:
- %lcssa = phi ptr [ poison, %for.inc.i.i.i ]
+ %lcssa = phi ptr [ %p, %for.inc.i.i.i ]
unreachable
}
@@ -73,29 +80,29 @@ L1:
}
; This loop has different uniform instructions before and after LCSSA.
-define void @test3() {
+define void @test3(ptr %p) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[ADD41:%.*]] = add i32 poison, poison
+; CHECK-NEXT: [[ADD41:%.*]] = add i32 3, 3
; CHECK-NEXT: [[IDXPROM4736:%.*]] = zext i32 [[ADD41]] to i64
-; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
+; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
; CHECK: while.body:
-; CHECK-NEXT: [[IDXPROM4738:%.*]] = phi i64 [ [[IDXPROM47:%.*]], [[WHILE_BODY]] ], [ [[IDXPROM4736]], [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[POS_337:%.*]] = phi i32 [ [[INC46:%.*]], [[WHILE_BODY]] ], [ [[ADD41]], [[ENTRY]] ]
+; CHECK-NEXT: [[IDXPROM4738:%.*]] = phi i64 [ [[IDXPROM47:%.*]], [[VECTOR_BODY]] ], [ [[IDXPROM4736]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[POS_337:%.*]] = phi i32 [ [[INC46:%.*]], [[VECTOR_BODY]] ], [ [[ADD41]], [[ENTRY]] ]
; CHECK-NEXT: [[INC46]] = add i32 [[POS_337]], 1
-; CHECK-NEXT: [[ARRAYIDX48:%.*]] = getelementptr inbounds [1024 x i8], ptr poison, i64 0, i64 [[IDXPROM4738]]
+; CHECK-NEXT: [[ARRAYIDX48:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P:%.*]], i64 0, i64 [[IDXPROM4738]]
; CHECK-NEXT: store i8 0, ptr [[ARRAYIDX48]], align 1
; CHECK-NEXT: [[AND43:%.*]] = and i32 [[INC46]], 3
; CHECK-NEXT: [[CMP44:%.*]] = icmp eq i32 [[AND43]], 0
; CHECK-NEXT: [[IDXPROM47]] = zext i32 [[INC46]] to i64
-; CHECK-NEXT: br i1 [[CMP44]], label [[WHILE_END:%.*]], label [[WHILE_BODY]]
+; CHECK-NEXT: br i1 [[CMP44]], label [[WHILE_END:%.*]], label [[VECTOR_BODY]]
; CHECK: while.end:
-; CHECK-NEXT: [[INC46_LCSSA:%.*]] = phi i32 [ [[INC46]], [[WHILE_BODY]] ]
+; CHECK-NEXT: [[INC46_LCSSA:%.*]] = phi i32 [ [[INC46]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[ADD58:%.*]] = add i32 [[INC46_LCSSA]], 4
; CHECK-NEXT: ret void
;
entry:
- %add41 = add i32 poison, poison
+ %add41 = add i32 3, 3
%idxprom4736 = zext i32 %add41 to i64
br label %while.body
@@ -103,7 +110,7 @@ while.body:
%idxprom4738 = phi i64 [ %idxprom47, %while.body ], [ %idxprom4736, %entry ]
%pos.337 = phi i32 [ %inc46, %while.body ], [ %add41, %entry ]
%inc46 = add i32 %pos.337, 1
- %arrayidx48 = getelementptr inbounds [1024 x i8], ptr poison, i64 0, i64 %idxprom4738
+ %arrayidx48 = getelementptr inbounds [1024 x i8], ptr %p, i64 0, i64 %idxprom4738
store i8 0, ptr %arrayidx48, align 1
%and43 = and i32 %inc46, 3
%cmp44 = icmp eq i32 %and43, 0
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