[llvm] [RISCV] Use vsetivli instead of `x0,x0` form to retain SEW/LMUL when AVL is imm (PR #169307)

[Luke Lau via llvm-commits]

================
@@ -47,6 +47,11 @@ static cl::opt<bool> EnsureWholeVectorRegisterMoveValidVTYPE(
              "vill is cleared"),
     cl::init(true));
 
+static cl::opt<bool> UseVsetivliForImmAVL(
+    DEBUG_TYPE "-use-vsetivli-for-imm-avl", cl::Hidden,
+    cl::desc("Use vsetivli to replace x0,x0 form when AVL is an immediate."),
+    cl::init(true));
----------------
lukel97 wrote:

I'm happy to not have a flag and just make this the unconditional default, if it's not degrading to any other uarchs. Do you have any data e.g. on the spacemit-x60 if there's any difference between x0,x0 and vsetivli togles?

https://github.com/llvm/llvm-project/pull/169307