[clang] [llvm] [CIR] X86 vector masked load builtins (PR #169464)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h,c -- clang/test/CIR/CodeGen/X86/avx512vl-builtins.c clang/lib/CIR/CodeGen/CIRGenBuilder.h clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp llvm/lib/Analysis/InstructionSimplify.cpp llvm/lib/IR/Verifier.cpp --diff_from_common_commit
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp
index e2f484fad..de80dfa4b 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -7151,7 +7151,7 @@ static Value *simplifyIntrinsic(CallBase *Call, Value *Callee,
   switch (IID) {
   case Intrinsic::masked_load:
   case Intrinsic::masked_gather: {
-    
+
     Value *MaskArg = Args[1];
     Value *PassthruArg = Args[2];
     // If the mask is all zeros or undef, the "passthru" argument is the result.

``````````

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https://github.com/llvm/llvm-project/pull/169464