[llvm] Use umin for x != 0 when +cssc is enabled (PR #169159)

[via llvm-commits]

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@@ -26417,6 +26418,12 @@ static SDValue performSETCCCombine(SDNode *N,
       return DAG.getNode(ISD::SETCC, DL, VT, TST, RHS, N->getOperand(2));
     }
   }
+  if (Subtarget->hasCSSC() && Cond == ISD::SETNE && isNullConstant(RHS) &&
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clingfei wrote:

Why not  `AfterLegalizeTypes`？I found that `AfterLegalizeDAG` will not execute `performSETCCCombine`. 
And I am not sure why `i128` is not desirable. I tested the following test case locally, and it seems it works well with this optimization. 
```
; auto icmpi128(int128 x0) { return x0 != 0; }
define i1 @icmpi128(i128 noundef %0) {
; CHECK-SD-LABEL: icmpi128:
; CHECK-SD:       // %bb.0: // %entry
; CHECK-SD-NEXT:    orr	x8, x0, x1
; CHECK-SD-NEXT:    cmp	x8, #0
; CHECK-SD-NEXT:    cset w0, ne
; CHECK-SD-NEXT:    ret
;
; CHECK-CSSC-LABEL: icmpi128:
; CHECK-CSSC:       // %bb.0: // %entry
; CHECK-CSSC-NEXT:    orr	x8, x0, x1
; CHECK-CSSC-NEXT:    umin	x0, x8, #1
; CHECK-CSSC-NEXT:    // kill: def $w0 killed $w0 killed $x0
; CHECK-CSSC-NEXT:    ret
;
entry:
  %2 = icmp ne i128 %0, 0
  ret i1 %2
}
```

https://github.com/llvm/llvm-project/pull/169159