[llvm] [bolt][aarch64] test to reproduce the issue with ldr reg, literal (PR #165723)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- bolt/include/bolt/Core/MCPlusBuilder.h bolt/lib/Passes/BinaryPasses.cpp bolt/lib/Rewrite/BinaryPassManager.cpp bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp bolt/lib/Target/X86/X86MCPlusBuilder.cpp --diff_from_common_commit
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/bolt/lib/Passes/BinaryPasses.cpp b/bolt/lib/Passes/BinaryPasses.cpp
index 28509e0c8..3f635c7c5 100644
--- a/bolt/lib/Passes/BinaryPasses.cpp
+++ b/bolt/lib/Passes/BinaryPasses.cpp
@@ -1201,7 +1201,7 @@ bool SimplifyRODataLoads::simplifyRODataLoads(BinaryFunction &BF) {
 
       if (MIB->hasPCRelOperand(Inst)) {
         // Try to find the symbol that corresponds to the PC-relative operand.
-        MCOperand *DispOpI = MIB->getMemOperandDisp(const_cast<MCInst&>(Inst));
+        MCOperand *DispOpI = MIB->getMemOperandDisp(const_cast<MCInst &>(Inst));
         assert(DispOpI != Inst.end() && "expected PC-relative displacement");
         assert(DispOpI->isExpr() &&
                "found PC-relative with non-symbolic displacement");
@@ -1242,8 +1242,8 @@ bool SimplifyRODataLoads::simplifyRODataLoads(BinaryFunction &BF) {
         // do not proceed if there aren't data markers for CIs
         BinaryFunction *BFTgt =
             BC.getBinaryFunctionContainingAddress(TargetAddress,
-                                /*CheckPastEnd*/ false,
-                                  /*UseMaxSize*/ true);
+                                                  /*CheckPastEnd*/ false,
+                                                  /*UseMaxSize*/ true);
         const bool IsInsideFunc =
             BFTgt && BFTgt->isInConstantIsland(TargetAddress);
 
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index c82f2f43c..cd9b39eb9 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -2773,7 +2773,7 @@ public:
   InstructionListType materializeConstant(const MCInst &Inst,
                                           StringRef ConstantData,
                                           uint64_t Offset) const override {
-     struct InstInfo {
+    struct InstInfo {
       // Size in bytes that Inst loads from memory.
       uint8_t DataSize;
       // number instructions needed to materialize the constant.
@@ -2785,20 +2785,25 @@ public:
     InstInfo I;
     InstructionListType Insts(0);
     switch (Inst.getOpcode()) {
-    case AArch64::LDRWl: I = {4, 2, AArch64::MOVKWi}; break;
-    case AArch64::LDRXl: I = {8, 4, AArch64::MOVKXi}; break;
+    case AArch64::LDRWl:
+      I = {4, 2, AArch64::MOVKWi};
+      break;
+    case AArch64::LDRXl:
+      I = {8, 4, AArch64::MOVKXi};
+      break;
     default:
       llvm_unreachable("unexpected ldr instruction");
       break;
     }
 
     const uint64_t ConstantSize = ConstantData.size() - Offset > I.DataSize
-                                    ? I.DataSize
-                                    : ConstantData.size() - Offset;
+                                      ? I.DataSize
+                                      : ConstantData.size() - Offset;
     if (ConstantSize != I.DataSize)
       return Insts;
 
-    const uint64_t ImmVal = DataExtractor(ConstantData, true, 8).getUnsigned(&Offset, I.DataSize);
+    const uint64_t ImmVal =
+        DataExtractor(ConstantData, true, 8).getUnsigned(&Offset, I.DataSize);
 
     Insts.resize(I.numInstrs);
     unsigned shift = (Insts.size() - 1) * 16;
diff --git a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
index ddc6dccd9..bf1adeabe 100644
--- a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
+++ b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
@@ -1495,7 +1495,6 @@ public:
     return Instrs;
   }
 
-
   /// TODO: this implementation currently works for the most common opcodes that
   /// load from memory. It can be extended to work with memory store opcodes as
   /// well as more memory load opcodes.

``````````

</details>


https://github.com/llvm/llvm-project/pull/165723