[llvm] [VPlan] Set ZeroIsPoison=false for FirstActiveLane (PR #169298)

David Sherwood via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 24 03:22:14 PST 2025


david-arm wrote:

OK, so if I've understood correctly this is trying to fix a bug with the existing interleaving code?

```
; CHECK-NEXT:    [[TMP44:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.nxv16i1(<vscale x 16 x i1> [[TMP31]], i1 true)
; CHECK-NEXT:    [[TMP44:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.nxv16i1(<vscale x 16 x i1> [[TMP31]], i1 false)
; CHECK-NEXT:    [[TMP45:%.*]] = mul i64 [[TMP40]], 2
; CHECK-NEXT:    [[TMP46:%.*]] = add i64 [[TMP45]], [[TMP44]]
; CHECK-NEXT:    [[TMP47:%.*]] = icmp ne i64 [[TMP44]], [[TMP40]]
```

where we were essentially relying upon a vector full of zero elements returning the element count? It's a problem because theoretically an IR pass could at some point detect that one of the vector is all-zeroes and replace the call with poison. The algorithm relies upon it returning the element count instead.

So I guess this change should be safe as it's just changing the behaviour of the intrinsic. For SVE it has no impact because the brkb instruction handles a zero vector in the way we want. It's only a problem for architectures that genuinely cannot handle zero vectors.

https://github.com/llvm/llvm-project/pull/169298


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