[llvm] [RISCV] Don't use `x0, x0` form to retain SEW/LMUL when AVL is imm (PR #169307)

Pengcheng Wang via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 24 02:54:59 PST 2025

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https://github.com/wangpc-pp ready_for_review https://github.com/llvm/llvm-project/pull/169307

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