[llvm] [DAG][X86] Improve custom i256/i512 AVX512 CTLZ/CTTZ Handling with MVT::i256/i512 (PR #168860)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 24 01:50:30 PST 2025
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@@ -5520,7 +5520,8 @@ static SDValue combineSTORE(SDNode *N, TargetLowering::DAGCombinerInfo &DCI,
// Unfortunately, we can't do this in the legalizer because there is no
// way to setOperationAction for an non-simple type.
StoreSDNode *ST = cast<StoreSDNode>(N);
- if (!ST->getValue().getValueType().isSimple())
+ if (!ST->getValue().getValueType().isSimple() ||
+ ST->getValue().getScalarValueSizeInBits() >= 256)
return lowerSTOREVector(SDValue(ST, 0), DCI.DAG, STI);
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RKSimon wrote:
Thanks - updated
https://github.com/llvm/llvm-project/pull/168860
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