[llvm] [LoongArch][NFC] Add tests for 256-bit vector broadcast (PR #169268)

via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 23 18:45:16 PST 2025


https://github.com/zhaoqi5 created https://github.com/llvm/llvm-project/pull/169268

None

>From bcd302e720a279acdd920afec4b964bd16c46788 Mon Sep 17 00:00:00 2001
From: Qi Zhao <zhaoqi01 at loongson.cn>
Date: Mon, 24 Nov 2025 10:40:20 +0800
Subject: [PATCH] [LoongArch][NFC] Add tests for 256-bit vector broadcast

---
 .../lasx/ir-instruction/shuffle-broadcast.ll  | 179 ++++++++++++++++++
 1 file changed, 179 insertions(+)
 create mode 100644 llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll

diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll
new file mode 100644
index 0000000000000..5eae364fd40cd
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll
@@ -0,0 +1,179 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx %s -o - | FileCheck %s
+; RUN: llc --mtriple=loongarch64 --mattr=+lasx %s -o - | FileCheck %s
+
+define void @broadcast0_v32i8(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast0_v32i8:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 68
+; CHECK-NEXT:    xvrepl128vei.b $xr0, $xr0, 0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <32 x i8>, ptr %a
+  %b = shufflevector <32 x i8> %va, <32 x i8> poison, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
+  store <32 x i8> %b, ptr %res
+  ret void
+}
+
+define void @broadcast_v32i8(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast_v32i8:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 238
+; CHECK-NEXT:    xvrepl128vei.b $xr0, $xr0, 13
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <32 x i8>, ptr %a
+  %b = shufflevector <32 x i8> %va, <32 x i8> poison, <32 x i32> <i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29>
+  store <32 x i8> %b, ptr %res
+  ret void
+}
+
+define void @broadcast0_v16i16(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast0_v16i16:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 68
+; CHECK-NEXT:    xvrepl128vei.h $xr0, $xr0, 0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <16 x i16>, ptr %a
+  %b = shufflevector <16 x i16> poison, <16 x i16> %va, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
+  store <16 x i16> %b, ptr %res
+  ret void
+}
+
+define void @broadcast_v16i16(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast_v16i16:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 68
+; CHECK-NEXT:    xvrepl128vei.h $xr0, $xr0, 3
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <16 x i16>, ptr %a
+  %b = shufflevector <16 x i16> poison, <16 x i16> %va, <16 x i32> <i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19>
+  store <16 x i16> %b, ptr %res
+  ret void
+}
+
+define void @broadcast0_v8i32(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast0_v8i32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 68
+; CHECK-NEXT:    xvrepl128vei.w $xr0, $xr0, 0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %b = shufflevector <8 x i32> poison, <8 x i32> %va, <8 x i32> <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
+  store <8 x i32> %b, ptr %res
+  ret void
+}
+
+define void @broadcast_v8i32(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast_v8i32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 238
+; CHECK-NEXT:    xvrepl128vei.w $xr0, $xr0, 1
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %b = shufflevector <8 x i32> %va, <8 x i32> poison, <8 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
+  store <8 x i32> %b, ptr %res
+  ret void
+}
+
+define void @broadcast0_v8f32(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast0_v8f32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 68
+; CHECK-NEXT:    xvrepl128vei.w $xr0, $xr0, 0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x float>, ptr %a
+  %b = shufflevector <8 x float> %va, <8 x float> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
+  store <8 x float> %b, ptr %res
+  ret void
+}
+
+define void @broadcast_v8f32(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast_v8f32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 68
+; CHECK-NEXT:    xvrepl128vei.w $xr0, $xr0, 1
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x float>, ptr %a
+  %b = shufflevector <8 x float> %va, <8 x float> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
+  store <8 x float> %b, ptr %res
+  ret void
+}
+
+define void @broadcast0_v4i64(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast0_v4i64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <4 x i64>, ptr %a
+  %b = shufflevector <4 x i64> %va, <4 x i64> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
+  store <4 x i64> %b, ptr %res
+  ret void
+}
+
+define void @broadcast_v4i64(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast_v4i64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 170
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <4 x i64>, ptr %a
+  %b = shufflevector <4 x i64> poison, <4 x i64> %va, <4 x i32> <i32 6, i32 6, i32 6, i32 6>
+  store <4 x i64> %b, ptr %res
+  ret void
+}
+
+define void @broadcast0_v4f64(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast0_v4f64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <4 x double>, ptr %a
+  %b = shufflevector <4 x double> poison, <4 x double> %va, <4 x i32> <i32 4, i32 4, i32 4, i32 4>
+  store <4 x double> %b, ptr %res
+  ret void
+}
+
+define void @broadcast_v4f64(ptr %res, ptr %a) nounwind {
+; CHECK-LABEL: broadcast_v4f64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 255
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <4 x double>, ptr %a
+  %b = shufflevector <4 x double> %va, <4 x double> poison, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
+  store <4 x double> %b, ptr %res
+  ret void
+}



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