[llvm] 996213c - [VPlan] Refine mayRead/WriteFromMemory for VPInst, fix VPlan SLP check.

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2025-11-23T21:12:24Z
New Revision: 996213c6ea0dc2e47624c6b06c0833a882c1c1f7

URL: https://github.com/llvm/llvm-project/commit/996213c6ea0dc2e47624c6b06c0833a882c1c1f7
DIFF: https://github.com/llvm/llvm-project/commit/996213c6ea0dc2e47624c6b06c0833a882c1c1f7.diff

LOG: [VPlan] Refine mayRead/WriteFromMemory for VPInst, fix VPlan SLP check.

Fix VPlan SLP check incorrectly bailing out for non-VPInstructions.
Starting from the beginning of the block will include canonical IVs,
which in turn are not VPInstructions. If we hit a non-VPInstruction, we
should conservatively treat is as potentially unvectorizable.

To keep the tests working as expected, refine mayRead/WriteFromMemory
for Load and GEP VPInstructions.

Added: 
    

Modified: 
    llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    llvm/lib/Transforms/Vectorize/VPlanSLP.cpp

Removed: 
    


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diff  --git a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
index 7ca1dbe51d68f..b27f2f8a3c8cb 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
@@ -50,8 +50,13 @@ bool VPRecipeBase::mayWriteToMemory() const {
   switch (getVPDefID()) {
   case VPExpressionSC:
     return cast<VPExpressionRecipe>(this)->mayReadOrWriteMemory();
-  case VPInstructionSC:
-    return cast<VPInstruction>(this)->opcodeMayReadOrWriteFromMemory();
+  case VPInstructionSC: {
+    auto *VPI = cast<VPInstruction>(this);
+    // Loads read from memory but don't write to memory.
+    if (VPI->getOpcode() == Instruction::Load)
+      return false;
+    return VPI->opcodeMayReadOrWriteFromMemory();
+  }
   case VPInterleaveEVLSC:
   case VPInterleaveSC:
     return cast<VPInterleaveBase>(this)->getNumStoreOperands() > 0;
@@ -1278,6 +1283,7 @@ bool VPInstruction::opcodeMayReadOrWriteFromMemory() const {
   if (Instruction::isBinaryOp(getOpcode()) || Instruction::isCast(getOpcode()))
     return false;
   switch (getOpcode()) {
+  case Instruction::GetElementPtr:
   case Instruction::ExtractElement:
   case Instruction::Freeze:
   case Instruction::FCmp:

diff  --git a/llvm/lib/Transforms/Vectorize/VPlanSLP.cpp b/llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
index 3b5cc9fcb9820..fd1176d4f5541 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
@@ -169,10 +169,10 @@ bool VPlanSlp::areVectorizable(ArrayRef<VPValue *> Operands) const {
   if (Opcode == Instruction::Load) {
     unsigned LoadsSeen = 0;
     VPBasicBlock *Parent = cast<VPInstruction>(Operands[0])->getParent();
-    for (auto &I : *Parent) {
+    for (auto &I : make_range(Parent->getFirstNonPhi(), Parent->end())) {
       auto *VPI = dyn_cast<VPInstruction>(&I);
       if (!VPI)
-        break;
+        return false;
       if (VPI->getOpcode() == Instruction::Load &&
           llvm::is_contained(Operands, VPI))
         LoadsSeen++;