[llvm] [AArch64] recognise zip1/zip2 with flipped operands (PR #167235)

[David Green via llvm-commits]

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@@ -14722,9 +14722,12 @@ SDValue AArch64TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op,
   }
 
   unsigned WhichResult;
-  if (isZIPMask(ShuffleMask, NumElts, WhichResult)) {
+  unsigned OperandOrder;
+  if (isZIPMask(ShuffleMask, NumElts, WhichResult, OperandOrder)) {
     unsigned Opc = (WhichResult == 0) ? AArch64ISD::ZIP1 : AArch64ISD::ZIP2;
-    return DAG.getNode(Opc, DL, V1.getValueType(), V1, V2);
+    return DAG.getNode(Opc, DL, V1.getValueType(),
+                       (OperandOrder == 0) ? V1 : V2,
+                       (OperandOrder == 0) ? V2 : V1);
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davemgreen wrote:

Can remove the brackets from `(OperandOrder == 0)`.

https://github.com/llvm/llvm-project/pull/167235