[llvm] [llvm][RISCV] Make X0 register pair legal in pre-ra pass (PR #169164)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Nov 22 09:12:04 PST 2025
topperc wrote:
So we have x0 as a store operand pre-ra? I thought it was a copy until the register coalescer pass runs.
https://github.com/llvm/llvm-project/pull/169164
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