[llvm] [X86][GISel] Fix crash on bitcasting i16 <-> half with gisel enabled. (PR #168456)

[Simon Pilgrim via llvm-commits]

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@@ -312,6 +312,55 @@ bool X86InstructionSelector::selectCopy(MachineInstr &I,
       }
     }
 
+    const int RegBankSize = 16;
+
+    // Special case GPR16 -> XMM
+    if (SrcSize == RegBankSize && SrcRegBank.getID() == X86::GPRRegBankID &&
+        (DstRegBank.getID() == X86::VECRRegBankID)) {
+
+      const DebugLoc &DL = I.getDebugLoc();
+
+      // Any extend GPR16 -> GPR32
+      Register ExtReg = MRI.createVirtualRegister(&X86::GR32RegClass);
+      BuildMI(*I.getParent(), I, DL, TII.get(TargetOpcode::SUBREG_TO_REG),
+              ExtReg)
+          .addImm(0)
+          .addReg(SrcReg)
+          .addImm(X86::sub_16bit);
+
+      // Copy GR32 -> XMM
+      BuildMI(*I.getParent(), I, DL, TII.get(TargetOpcode::COPY), DstReg)
+          .addReg(ExtReg);
+
+      I.eraseFromParent();
+    }
+
+    // Special case XMM -> GR16
+    if (DstSize == RegBankSize && DstRegBank.getID() == X86::GPRRegBankID &&
----------------
RKSimon wrote:

```suggestion
    if (DstSize == 16 && DstRegBank.getID() == X86::GPRRegBankID &&
```

https://github.com/llvm/llvm-project/pull/168456