[llvm] [DAG][X86] Improve custom i256/i512 AVX512 CTLZ/CTTZ Handling with MVT::i256/i512 (PR #168860)

Phoebe Wang via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 20 19:20:40 PST 2025


phoebewang wrote:

> However to declare these i256/i512 ops as custom, we need to add MVT::i256/i512 simple types - I'm intending to add further large integer handling in the future, some of which will use vector register instructions, and its going to be much easier if this can be handled with i128/i256/i512 types that match the vector register sizes.

Is there any other work to do when adding new simple types? I see we can expand up to i128 libraries for now, do we need to extend it to i512?

https://github.com/llvm/llvm-project/pull/168860


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