[llvm] [NVPTX] Use PRMT instruction to lower i16 bswap (PR #168968)

[Alex MacLean via llvm-commits]

AlexMaclean wrote:

> > If you wanted to go above and beyond, I think it would be best to instead implement this (and all other bswap expansion) as a custom legalization to allow for DAGCombiner to optimize them.
> 
> I see. Do you mean that we just lower all the bswap into bit operations first and let DAGCombiner decide how to optimize using PRMT?

sorta, something along the lines of `LowerVECTOR_SHUFFLE`. That is use the NVPTXISD::PRTM node plus zext, trunc to represent this same expansion during operation legalization (instead of in ISel where it is now). Does that make sense?

https://github.com/llvm/llvm-project/pull/168968