[llvm] [AMDGPU] Precommit test for issue in amdgpu-rewrite-agpr-copy-mfma, (PR #168609)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,33 @@
+# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -run-pass=greedy,amdgpu-rewrite-agpr-copy-mfma -verify-machineinstrs -o - %s 2>&1 | FileCheck %s
+# CHECK: Illegal virtual register for instruction
+# CHECK: Expected a VGPR_32 register, but got a AGPR_32 register
+ 
+# Test for issue in amdgpu-rewrite-agpr-copy-mfma, which reassigns scale operand
+# in vgpr_32 register to agpr_32, not permitted by instruction format.
+---
+name:            test
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins:
+ 
+    %0:vgpr_32 = IMPLICIT_DEF
+    %1:av_128_align2 = IMPLICIT_DEF
+    undef %2.sub0:vreg_128_align2 = IMPLICIT_DEF
+ 
+  bb.1:
+    liveins:
+ 
+    %3:vgpr_32 = IMPLICIT_DEF
+    %4:av_128_align2 = IMPLICIT_DEF
+    %5:vreg_128_align2 = V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 undef %4, %1, %2, 4, 4, undef %3, %0, 4, 0, implicit $mode, implicit $exec
----------------
arsenm wrote:

```suggestion
    %5:vreg_128_align2 = V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 %4, %1, %2, 4, 4, %3, %0, 4, 0, implicit $mode, implicit $exec
```

https://github.com/llvm/llvm-project/pull/168609