[llvm] [AMDGPU] Implement codegen for GFX11+ V_CVT_PK_[IU]16_F32 (PR #168719)

[Matt Arsenault via llvm-commits]

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@@ -6806,6 +6806,11 @@ SDValue SITargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
     return splitTernaryVectorOp(Op, DAG);
   case ISD::FP_TO_SINT:
   case ISD::FP_TO_UINT:
+    if (AMDGPU::isGFX11Plus(*Subtarget) && Op.getValueType() == MVT::i16 &&
+        Op.getOperand(0).getValueType() == MVT::f32) {
+      // Make f32->i16 legal so we can select V_CVT_PK_[IU]16_F32.
+      return Op;
+    }
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arsenm wrote:

Why not sink this into LowerFP_TO_INT?

https://github.com/llvm/llvm-project/pull/168719