[llvm] [VPlan] Avoid copying over nsw on certain inductions (PR #168922)

[Danila Malyutin via llvm-commits]

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@@ -87,9 +87,15 @@ inline VPIRFlags getFlagsFromIndDesc(const InductionDescriptor &ID) {
     return ID.getInductionBinOp()->getFastMathFlags();
 
   if (auto *OBO = dyn_cast_if_present<OverflowingBinaryOperator>(
-          ID.getInductionBinOp()))
-    return VPIRFlags::WrapFlagsTy(OBO->hasNoUnsignedWrap(),
-                                  OBO->hasNoSignedWrap());
+          ID.getInductionBinOp())) {
+    // We must drop nsw if the signs of the induction start and the induction
+    // step differ, as this could sign-wrap over iterations.
+    bool HasNSW = OBO->hasNoSignedWrap() && ID.getConstIntStartValue() &&
+                  ID.getConstIntStepValue() &&
+                  !(ID.getConstIntStartValue()->isNegative() ^
+                    ID.getConstIntStepValue()->isNegative());
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danilaml wrote:

Can this just be `ID.getConstIntStartValue()->isNegative() == ID.getConstIntStepValue()->isNegative()`?

https://github.com/llvm/llvm-project/pull/168922