[llvm] [ISel] Introduce llvm.clmul intrinsic (PR #168731)

[Craig Topper via llvm-commits]

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@@ -11771,6 +11791,11 @@ SDValue DAGCombiner::visitBITREVERSE(SDNode *N) {
       sd_match(N, m_BitReverse(m_Shl(m_BitReverse(m_Value(X)), m_Value(Y)))))
     return DAG.getNode(ISD::SRL, DL, VT, X, Y);
 
+  // fold bitreverse(clmul(bitreverse(x), bitreverse(y))) -> clmulr(x, y)
+  if (sd_match(N, m_BitReverse(m_Clmul(m_BitReverse(m_Value(X)),
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topperc wrote:

Can we do `sd_match(N0, m_Clmul(m_BitReverse(m_Value(X)), m_BitReverse(m_Value(Y)))`? I'm baffled why the existing patterns in this function match the outer reverse.

https://github.com/llvm/llvm-project/pull/168731