[llvm] [SPIRV] Enable DCE in instruction selection and update tests (PR #168428)
Steven Perron via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 20 09:19:58 PST 2025
================
@@ -223,14 +224,37 @@ SPIRVType *SPIRVGlobalRegistry::getOpTypeVoid(MachineIRBuilder &MIRBuilder) {
}
void SPIRVGlobalRegistry::invalidateMachineInstr(MachineInstr *MI) {
- // TODO:
- // - review other data structure wrt. possible issues related to removal
- // of a machine instruction during instruction selection.
+ // Other maps that may hold MachineInstr*:
+ // - VRegToTypeMap: Clearing would require a linear search. If we are deleting
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s-perron wrote:
I found cases where the VRegToTypeMap is simply wrong. Adding an assert to identify those cases would be more work than I want for an assert. I fixed on place this was happening, but I quickly found that fixing some others is out of scope for this PR.
The invalid information has not caused any problems so far. We can follow up if we see problems.
https://github.com/llvm/llvm-project/pull/168428
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