[llvm] [DAG] Fold mul 0 -> 0 when expanding mul into parts. (PR #168780)

[Craig Topper via llvm-commits]

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@@ -11096,10 +11095,14 @@ void TargetLowering::forceExpandMultiply(SelectionDAG &DAG, const SDLoc &dl,
   // If HiLHS and HiRHS are set, multiply them by the opposite low part and add
   // the products to Hi.
   if (HiLHS) {
-    Hi = DAG.getNode(ISD::ADD, dl, VT, Hi,
-                     DAG.getNode(ISD::ADD, dl, VT,
-                                 DAG.getNode(ISD::MUL, dl, VT, HiRHS, LHS),
-                                 DAG.getNode(ISD::MUL, dl, VT, RHS, HiLHS)));
+    Hi = DAG.getNode(
+        ISD::ADD, dl, VT, Hi,
+        DAG.getNode(
+            ISD::ADD, dl, VT,
+            isNullConstant(HiRHS) ? HiRHS
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topperc wrote:

What's the impact if we had a zero check to getNode like we do for ISD::AND/OR/XOR/ADD/SUB?

https://github.com/llvm/llvm-project/pull/168780