[llvm] [ISel] Introduce llvm.clmul[rh] intrinsics (PR #168731)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 19 12:55:46 PST 2025
================
@@ -8301,6 +8301,46 @@ SDValue TargetLowering::expandFunnelShift(SDNode *Node,
return DAG.getNode(ISD::OR, DL, VT, ShX, ShY);
}
+SDValue TargetLowering::expandCLMUL(SDNode *Node, SelectionDAG &DAG) const {
+ SDLoc DL(Node);
+ EVT VT = Node->getValueType(0);
+ SDValue X = Node->getOperand(0);
+ SDValue Y = Node->getOperand(1);
+ unsigned BW = VT.getScalarSizeInBits();
+
+ if (VT.isVector() && (isOperationLegalOrCustomOrPromote(
+ Node->getOpcode(), VT.getVectorElementType()) ||
+ !isOperationLegalOrCustom(ISD::VSELECT, VT)))
+ return DAG.UnrollVectorOp(Node);
+
+ SDValue Res = DAG.getConstant(0, DL, VT);
+ switch (Node->getOpcode()) {
+ case ISD::CLMUL: {
+ for (unsigned I = 0; I < BW; ++I) {
+ SDValue SignMask = DAG.getConstant(APInt::getOneBitSet(BW, I), DL, VT);
----------------
topperc wrote:
SignMask is not a good name
https://github.com/llvm/llvm-project/pull/168731
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