[llvm] [ISel] Introduce llvm.clmul[rh] intrinsics (PR #168731)

[Craig Topper via llvm-commits]

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@@ -799,6 +802,11 @@ bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
   case ISD::LLRINT:
     Res = ScalarizeVecOp_UnaryOp(N);
     break;
+  case ISD::CLMUL:
+  case ISD::CLMULR:
+  case ISD::CLMULH:
+    Res = ScalarizeVecOp_BinOp(N);
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topperc wrote:

This code should be unreachable. If the input and output types are the same, there is no way to need to legalize an operand without already legalizing the result first.

https://github.com/llvm/llvm-project/pull/168731