[llvm] 3890a4a - [RISCV] Update X60 ReleaseAtCycles for Vector Integer Arithmetic Instructions (#152557)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 19 09:53:27 PST 2025
Author: Mikhail R. Gadelha
Date: 2025-11-19T14:53:20-03:00
New Revision: 3890a4a9e5a8c128cf9b193c57841efbbaf36866
URL: https://github.com/llvm/llvm-project/commit/3890a4a9e5a8c128cf9b193c57841efbbaf36866
DIFF: https://github.com/llvm/llvm-project/commit/3890a4a9e5a8c128cf9b193c57841efbbaf36866.diff
LOG: [RISCV] Update X60 ReleaseAtCycles for Vector Integer Arithmetic Instructions (#152557)
This PR updates the ReleaseAtCycles for all instructions described in
Section 11 of the RVV Spec: Vector Integer Arithmetic Instructions. The
data used comes from camel-cdr.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
index 4271a6816e05b..28850bdd9ec1f 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
@@ -418,21 +418,28 @@ foreach LMul = [1, 2, 4, 8] in {
foreach mx = SchedMxList in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
- let Latency = Get4458Latency<mx>.c, ReleaseAtCycles = [4] in {
+ let Latency = Get4458Latency<mx>.c, ReleaseAtCycles = [ConstOneUntilM1ThenDouble<mx>.c] in {
defm "" : LMULWriteResMX<"WriteVIMinMaxV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIMinMaxX", [SMX60_VIEU], mx, IsWorstCase>;
}
+ // Latency of vadd, vsub, vrsub: 4/4/5/8
+ // ReleaseAtCycles of vadd, vsub, vrsub: 1/2/4/8
+ // Latency of vand, vor, vxor: 4/4/8/16
+ // ReleaseAtCycles of vand, vor, vxor: 2/4/8/16
+ // They are grouped together, so we used the worst case 4/4/8/16 and 2/4/8/16
+ // TODO: use InstRW to override individual instructions' scheduling data
defvar VIALULat = ConstValueUntilLMULThenDouble<"M2", 4, mx>.c;
- let Latency = VIALULat, ReleaseAtCycles = [4] in {
- // Pattern of vadd, vsub, vrsub: 4/4/5/8
- // Pattern of vand, vor, vxor: 4/4/8/16
- // They are grouped together, so we used the worst case 4/4/8/16
- // TODO: use InstRW to override individual instructions' scheduling data
+ defvar VIALUOcc = ConstOneUntilMF2ThenDouble<mx>.c;
+ let Latency = VIALULat, ReleaseAtCycles = [VIALUOcc] in {
defm "" : LMULWriteResMX<"WriteVIALUV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIALUX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIALUI", [SMX60_VIEU], mx, IsWorstCase>;
+ }
+ defvar VILogicalLat = ConstValueUntilLMULThenDouble<"M2", 4, mx>.c;
+ defvar VILogicalOcc = ConstValueUntilLMULThenDouble<"MF2", 1, mx>.c;
+ let Latency = VILogicalLat, ReleaseAtCycles = [VILogicalOcc] in {
defm "" : LMULWriteResMX<"WriteVExtV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIMergeV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIMergeX", [SMX60_VIEU], mx, IsWorstCase>;
@@ -449,7 +456,9 @@ foreach mx = SchedMxList in {
defm "" : LMULWriteResMX<"WriteVICALUI", [SMX60_VIEU], mx, IsWorstCase>;
}
- let Latency = Get461018Latency<mx>.c, ReleaseAtCycles = [4] in {
+ // Slightly increase Occ when LMUL == M8
+ defvar VICmpCarryOcc = GetLMULValue<[1, 1, 1, 2, 4, 8, 18], mx>.c;
+ let Latency = Get461018Latency<mx>.c, ReleaseAtCycles = [VICmpCarryOcc] in {
defm "" : LMULWriteResMX<"WriteVICALUMV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVICALUMX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVICALUMI", [SMX60_VIEU], mx, IsWorstCase>;
@@ -458,10 +467,14 @@ foreach mx = SchedMxList in {
defm "" : LMULWriteResMX<"WriteVICmpI", [SMX60_VIEU], mx, IsWorstCase>;
}
- // Pattern of vmacc, vmadd, vmul, vmulh, etc.: e8/e16 = 4/4/5/8, e32 = 5,5,5,8,
+ // Latency of vmacc, vmadd, vmul, vmulh, etc.: e8/e16 = 4/4/5/8, e32 = 5,5,5,8,
// e64 = 7,8,16,32. We use the worst-case until we can split the SEW.
// TODO: change WriteVIMulV, etc to be defined with LMULSEWSchedWrites
- let Latency = ConstValueUntilLMULThenDoubleBase<"M2", 7, 8, mx>.c, ReleaseAtCycles = [7] in {
+ defvar VIMulLat = ConstValueUntilLMULThenDoubleBase<"M2", 7, 8, mx>.c;
+ // ReleaseAtCycles for vnmsac/vnmsub is 1/1/1/1/2/5 but we use the worse case
+ // here since they are grouped together with vmacc/vmadd/vmul/vmulh.
+ defvar VIMulOcc = ConstOneUntilM1ThenDouble<mx>.c;
+ let Latency = VIMulLat, ReleaseAtCycles = [VIMulOcc] in {
defm "" : LMULWriteResMX<"WriteVIMulV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIMulX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIMulAddV", [SMX60_VIEU], mx, IsWorstCase>;
@@ -475,7 +488,8 @@ foreach mx = SchedMxList in {
foreach mx = SchedMxListW in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
- let Latency = Get4588Latency<mx>.c, ReleaseAtCycles = [4] in {
+ defvar VIWideningOcc = ConstOneUntilMF2ThenDouble<mx>.c;
+ let Latency = Get4588Latency<mx>.c, ReleaseAtCycles = [VIWideningOcc] in {
defm "" : LMULWriteResMX<"WriteVIWALUV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIWALUX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIWALUI", [SMX60_VIEU], mx, IsWorstCase>;
@@ -497,8 +511,9 @@ foreach mx = SchedMxList in {
foreach sew = SchedSEWSet<mx>.val in {
defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxList>.c;
- defvar VIDivLat = ConstValueUntilLMULThenDouble<"MF2", 12, mx>.c;
- let Latency = VIDivLat, ReleaseAtCycles = [12] in {
+ // Not pipelined
+ defvar VIDivLatAndOcc = ConstValueUntilLMULThenDouble<"MF2", 12, mx>.c;
+ let Latency = VIDivLatAndOcc, ReleaseAtCycles = [VIDivLatAndOcc] in {
defm "" : LMULSEWWriteResMXSEW<"WriteVIDivV", [SMX60_VIEU], mx, sew, IsWorstCase>;
defm "" : LMULSEWWriteResMXSEW<"WriteVIDivX", [SMX60_VIEU], mx, sew, IsWorstCase>;
}
@@ -510,7 +525,8 @@ foreach mx = SchedMxListW in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
defvar VNarrowingLat = ConstValueUntilLMULThenDouble<"M1", 4, mx>.c;
- let Latency = VNarrowingLat, ReleaseAtCycles = [4] in {
+ defvar VNarrowingOcc = ConstValueUntilLMULThenDouble<"MF4", 1, mx>.c;
+ let Latency = VNarrowingLat, ReleaseAtCycles = [VNarrowingOcc] in {
defm "" : LMULWriteResMX<"WriteVNShiftV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVNShiftX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVNShiftI", [SMX60_VIEU], mx, IsWorstCase>;
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
index 234a3e2b6689c..7fff4337bbbb6 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
@@ -2322,685 +2322,685 @@ vwsub.wx v8, v16, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -3354,533 +3354,533 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4322,245 +4322,245 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK: Resources:
# CHECK-NEXT: [0] - SMX60_FP
@@ -4574,690 +4574,690 @@ vwsub.wx v8, v16, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 1120.00 - - - - 4084.00 -
+# CHECK-NEXT: - 1120.00 - - - - 4808.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5611,533 +5611,533 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: - - - - - - 8.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6579,242 +6579,242 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: - - - - - - 8.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwsub.wx v8, v16, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
index 5a5f366aa79f3..712de84d1598d 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
@@ -1478,1157 +1478,1157 @@ vssrl.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2906,1162 +2906,1162 @@ vssrl.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 708.00 - - - - 3060.00 -
+# CHECK-NEXT: - 708.00 - - - - 4140.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 2.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
index f0247e499b4c3..ec251b970237f 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
@@ -926,885 +926,885 @@ vmslt.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 SMX60_VIEU[8] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK: Resources:
# CHECK-NEXT: [0] - SMX60_FP
@@ -1818,887 +1818,887 @@ vmslt.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 440.00 - - - - 1760.00 -
+# CHECK-NEXT: - 440.00 - - - - 2680.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
index 9592d1bf46b85..db74f94dd083c 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
@@ -615,117 +615,117 @@ vfwcvt.xu.f.v v8, v16
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1189,122 +1189,122 @@ vfwcvt.xu.f.v v8, v16
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 281.00 - - - 225.00 224.00 -
+# CHECK-NEXT: - 281.00 - - - 225.00 368.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 2.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - 1.00 - - vfcvt.f.xu.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
index d8e0febb4937a..00924f803a4af 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
@@ -755,567 +755,567 @@ vfwnmsac.vv v8, v16, v24
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1473,572 +1473,572 @@ vfwnmsac.vv v8, v16, v24
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 353.00 - - - 72.00 1652.00 -
+# CHECK-NEXT: - 353.00 - - - 72.00 864.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 2.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 4.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
index 2b6f4baff4c1d..d25e5897ed925 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
@@ -386,357 +386,357 @@ vminu.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK: Resources:
# CHECK-NEXT: [0] - SMX60_FP
@@ -750,359 +750,359 @@ vminu.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 176.00 - - - - 704.00 -
+# CHECK-NEXT: - 176.00 - - - - 528.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
index a166f15a99b8d..3350eedc89a09 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
@@ -1022,93 +1022,93 @@ vsmul.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1116,43 +1116,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1160,43 +1160,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1204,43 +1204,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1248,43 +1248,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1292,43 +1292,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1336,43 +1336,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1380,43 +1380,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1424,487 +1424,487 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 2.00 8 SMX60_VIEU[2] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 8.00 32 SMX60_VIEU[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2006,98 +2006,98 @@ vsmul.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 486.00 - - - - 4196.00 -
+# CHECK-NEXT: - 486.00 - - - - 13404.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2105,43 +2105,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2149,43 +2149,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2193,43 +2193,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2237,43 +2237,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2281,43 +2281,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2325,43 +2325,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2369,43 +2369,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2413,487 +2413,487 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
index de1a5971fcd1d..0e2987dcc92da 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
@@ -1198,137 +1198,137 @@ vfslide1up.vf v8, v16, ft0
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMV_X_S vmv.x.s s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2120,137 +2120,137 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 256 256.00 256 SMX60_VIEU[256] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2354,142 +2354,142 @@ vfslide1up.vf v8, v16, ft0
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 572.00 - - - 225.00 5253.00 -
+# CHECK-NEXT: - 572.00 - - - 225.00 5481.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 6.00 - vmv.x.s s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3281,137 +3281,137 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: - - - - - - 256.00 - vrgatherei16.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 2.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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