[llvm] Re-land [Transform][LoadStoreVectorizer] allow redundant in Chain (PR #168135)
Drew Kersnar via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 19 08:39:46 PST 2025
================
@@ -626,22 +626,25 @@ std::vector<Chain> Vectorizer::splitChainByContiguity(Chain &C) {
std::vector<Chain> Ret;
Ret.push_back({C.front()});
- unsigned ElemBytes = DL.getTypeStoreSize(getChainElemTy(C));
+ unsigned ChainElemTyBits = DL.getTypeSizeInBits(getChainElemTy(C));
APInt PrevReadEnd = C[0].OffsetFromLeader +
DL.getTypeStoreSize(getLoadStoreType(&*C[0].Inst));
for (auto It = std::next(C.begin()), End = C.end(); It != End; ++It) {
- // `prev` accesses offsets [PrevDistFromBase, PrevReadEnd).
auto &CurChain = Ret.back();
unsigned SzBytes = DL.getTypeStoreSize(getLoadStoreType(&*It->Inst));
// Add this instruction to the end of the current chain, or start a new one.
- assert(SzBytes % ElemBytes == 0);
+ assert(
+ 8 * SzBytes % ChainElemTyBits == 0 &&
+ "Every chain-element size must be a multiple of the element size after "
+ "vectorization.");
APInt ReadEnd = It->OffsetFromLeader + SzBytes;
// Allow redundancy: partial or full overlap counts as contiguous.
bool AreContiguous = false;
if (It->OffsetFromLeader.sle(PrevReadEnd)) {
+ // Check overlap is a multiple of the element size after vectorization.
uint64_t Overlap = (PrevReadEnd - It->OffsetFromLeader).getZExtValue();
- if (Overlap % ElemBytes == 0)
+ if (8 * Overlap % ChainElemTyBits == 0)
----------------
dakersnar wrote:
Will this overlap condition ever fail? If so, can you add a unit test that demonstrates an example where the chain is broken due to this condition being false? And if not, maybe we should change this to an assert.
https://github.com/llvm/llvm-project/pull/168135
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