[llvm] [mlir] [TableGen] Split *GenRegisterInfo.inc. (PR #167700)

Ivan Kosarev via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 17 03:54:44 PST 2025


kosarev wrote:

> This generates lines like
> 
> ```
> #include "gen/llvm/lib/Target/X86/MCTargetDesc/X86GenRegisterInfoEnums.inc"
> ```

Interesting, what kind of build is that? I don't see full paths be passed to TableGen in my Linux builds, but I see https://github.com/llvm/llvm-project/pull/168158 suffers from the same issue.

Does https://github.com/llvm/llvm-project/pull/168355 fix this?


> I suggest we could split the rule into "enums" and "bodies" with two actions rather than byproduct.

That'd be the best to do, but generating AMDGPUGenRegisterInfo.inc takes a lot of time, so is problematic in practice.

https://github.com/llvm/llvm-project/pull/167700


More information about the llvm-commits mailing list