[llvm] [WebAssembly] Add pattern for relaxed laneselect (from bitselect simd) (PR #163807)

[Sam Parker via llvm-commits]

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@@ -1662,6 +1662,13 @@ multiclass SIMDLANESELECT<Vec vec, bits<32> op> {
                 (vec.vt V128:$a), (vec.vt V128:$b), (vec.vt V128:$c)))],
               vec.prefix#".relaxed_laneselect\t$dst, $a, $b, $c",
               vec.prefix#".relaxed_laneselect", op>;
+
+  let AddedComplexity = 1 in {
+    def : Pat<(vec.vt (int_wasm_bitselect
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sparker-arm wrote:

Sorry, I forgot about this.

I'm apprehensive about mapping user-facing intrinsics, of one wasm operation, onto a different one. I can only presume that users writing code in intrinsics will expect it to behave in that defined way. The author may be mixing relaxed and non-relaxed intrinsics and it could become impossible for them to generate the code that they want (and have explicitly written).

https://github.com/llvm/llvm-project/pull/163807