[llvm] 0f0cf84 - [gn] port 900c51791979 (amdgpu SDNodeInfo)

[Nico Weber via llvm-commits]

Author: Nico Weber
Date: 2025-11-17T18:57:50-05:00
New Revision: 0f0cf84dba666af56778bc163f65060585d55390

URL: https://github.com/llvm/llvm-project/commit/0f0cf84dba666af56778bc163f65060585d55390
DIFF: https://github.com/llvm/llvm-project/commit/0f0cf84dba666af56778bc163f65060585d55390.diff

LOG: [gn] port 900c51791979 (amdgpu SDNodeInfo)

Added: 
    

Modified: 
    llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn

Removed: 
    


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diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
index e47ca1e07670a..0ef1ee6a4c060 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
@@ -69,6 +69,12 @@ tablegen("AMDGPUGenRegisterBank") {
   td_file = "AMDGPU.td"
 }
 
+tablegen("AMDGPUGenSDNodeInfo") {
+  visibility = [ ":LLVMAMDGPUCodeGen" ]
+  args = [ "-gen-sd-node-info" ]
+  td_file = "AMDGPU.td"
+}
+
 tablegen("InstCombineTables") {
   visibility = [ ":LLVMAMDGPUCodeGen" ]
   args = [ "-gen-searchable-tables" ]
@@ -103,6 +109,7 @@ static_library("LLVMAMDGPUCodeGen") {
     ":AMDGPUGenPreLegalizeGICombiner",
     ":AMDGPUGenRegBankGICombiner",
     ":AMDGPUGenRegisterBank",
+    ":AMDGPUGenSDNodeInfo",
     ":InstCombineTables",
     ":R600GenCallingConv",
     ":R600GenDAGISel",