[llvm] [M68k] Prevent COPY instruction from killing live condition flags (PR #168485)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/Target/M68k/M68kInstrInfo.cpp llvm/lib/Target/M68k/M68kSubtarget.h --diff_from_common_commit
``````````

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``````````diff
diff --git a/llvm/lib/Target/M68k/M68kInstrInfo.cpp b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
index 40f2d9b37..c33c5f4f3 100644
--- a/llvm/lib/Target/M68k/M68kInstrInfo.cpp
+++ b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
@@ -583,8 +583,10 @@ bool M68kInstrInfo::ExpandCCR(MachineInstrBuilder &MIB, bool IsToCCR) const {
   // Replace the pseudo instruction with the real one
   if (IsToCCR)
     MIB->setDesc(get(M68k::MOV16cd));
-  else if (MIB->getParent()->getParent()->getSubtarget<M68kSubtarget>()
-            .atLeastM68010())
+  else if (MIB->getParent()
+               ->getParent()
+               ->getSubtarget<M68kSubtarget>()
+               .atLeastM68010())
     MIB->setDesc(get(M68k::MOV16dc));
   else
     MIB->setDesc(get(M68k::MOV16ds));
@@ -785,12 +787,12 @@ void M68kInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
   }
   if (DstReg == M68k::CCR) {
     BuildMI(MBB, MI, DL, get(Opc), M68k::CCR)
-      .addReg(SrcReg, getKillRegState(KillSrc));
+        .addReg(SrcReg, getKillRegState(KillSrc));
     return;
   }
   if (UsedRegs.available(M68k::CCR)) {
     BuildMI(MBB, MI, DL, get(Opc), DstReg)
-      .addReg(SrcReg, getKillRegState(KillSrc));
+        .addReg(SrcReg, getKillRegState(KillSrc));
     return;
   }
 
@@ -800,15 +802,15 @@ void M68kInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
 
   // Look for an available data register for the CCR, or push to stack if
   // there are none
-  BitVector Allocatable = RI.getAllocatableSet(
-      MF, RI.getRegClass(M68k::DR16RegClassID));
+  BitVector Allocatable =
+      RI.getAllocatableSet(MF, RI.getRegClass(M68k::DR16RegClassID));
   for (Register Reg : Allocatable.set_bits()) {
     if (!RI.regsOverlap(DstReg, Reg) && (UsedRegs.available(Reg))) {
       unsigned CCRPushOp = STI.isM68000() ? M68k::MOV16ds : M68k::MOV16dc;
       unsigned CCRPopOp = M68k::MOV16cd;
       BuildMI(MBB, MI, DL, get(CCRPushOp), Reg).addReg(CCRSrcReg);
       BuildMI(MBB, MI, DL, get(Opc), DstReg)
-        .addReg(SrcReg, getKillRegState(KillSrc));
+          .addReg(SrcReg, getKillRegState(KillSrc));
       BuildMI(MBB, MI, DL, get(CCRPopOp), M68k::CCR).addReg(Reg);
       return;
     }
@@ -817,9 +819,11 @@ void M68kInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
   unsigned CCRPushOp = STI.isM68000() ? M68k::MOV16es : M68k::MOV16ec;
   unsigned CCRPopOp = M68k::MOV16co;
 
-  BuildMI(MBB, MI, DL, get(CCRPushOp)).addReg(RI.getStackRegister()).addReg(CCRSrcReg);
+  BuildMI(MBB, MI, DL, get(CCRPushOp))
+      .addReg(RI.getStackRegister())
+      .addReg(CCRSrcReg);
   BuildMI(MBB, MI, DL, get(Opc), DstReg)
-    .addReg(SrcReg, getKillRegState(KillSrc));
+      .addReg(SrcReg, getKillRegState(KillSrc));
   BuildMI(MBB, MI, DL, get(CCRPopOp), M68k::CCR).addReg(RI.getStackRegister());
   return;
 }

``````````

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https://github.com/llvm/llvm-project/pull/168485