[llvm] [AArch64][GlobalISel] SIMD fpcvt codegen for rounding nodes (PR #165546)

[David Green via llvm-commits]

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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple aarch64-unknown-unknown -mattr=+fprcvt,+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc < %s -mtriple aarch64-unknown-unknown -global-isel -global-isel-abort=2 -mattr=+fprcvt,+fullfp16 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
+
+;  CHECK-GI: warning: Instruction selection used fallback path for lround_i32_f16_simd
+;  CHECK-GI-NEXT: warning: Instruction selection used fallback path for lround_i64_f16_simd
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davemgreen wrote:

Yeah that looks like it could do with more work - it's not one of the intrinsics we got to in our sweep of FP. It makes some of the patterns added here untested as they do not reach that far into the pipeline. I have put up #168427 to add some basic legalisation.

https://github.com/llvm/llvm-project/pull/165546