[lld] [wip][LLD] Support RISCV vendor-specific relocations. (PR #168497)

[Sam Elliott via llvm-commits]

================
@@ -1703,6 +1704,18 @@ void DynamicReloc::finalize(Ctx &ctx, SymbolTableBaseSection *symt) {
   isFinal = true; // Catch errors
 }
 
+size_t RelocationBaseSection::getSize() const {
+  size_t size = relocs.size() * entsize;
+  if (ctx.arg.emachine == EM_RISCV) {
+    for (const auto &reloc : relocs) {
+      if (reloc.type.v & INTERNAL_RISCV_VENDOR_MASK) {
+        size += entsize;
+      }
----------------
lenary wrote:

Alright, I see why you split bit 8 and bit 9, so this will need a slight update with my scheme. I still think mine is slightly neater, even with this check.



https://github.com/llvm/llvm-project/pull/168497