[llvm] [AMDGPU] Propagate debug locations to compiler-generated instructions (PR #168573)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 18 09:30:35 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Aleksandar Spasojevic (aleksandar-amd)
<details>
<summary>Changes</summary>
Constant materialization instructions are assigned accurate debug locations.
Debug metadata propagation in SIWholeQuadMode pass.
---
Full diff: https://github.com/llvm/llvm-project/pull/168573.diff
3 Files Affected:
- (modified) llvm/include/llvm/CodeGen/SelectionDAGNodes.h (+2-2)
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (+1-1)
- (modified) llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp (+14-8)
``````````diff
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
index cfc8a4243e894..05833f97bc035 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -1754,8 +1754,8 @@ class ConstantSDNode : public SDNode {
const ConstantInt *Value;
ConstantSDNode(bool isTarget, bool isOpaque, const ConstantInt *val,
- SDVTList VTs)
- : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DebugLoc(),
+ SDVTList VTs, const DebugLoc &DL)
+ : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DL,
VTs),
Value(val) {
assert(!isa<VectorType>(val->getType()) && "Unexpected vector type!");
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 16fdef06d6679..5502bddbc3ba7 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1773,7 +1773,7 @@ SDValue SelectionDAG::getConstant(const ConstantInt &Val, const SDLoc &DL,
return SDValue(N, 0);
if (!N) {
- N = newSDNode<ConstantSDNode>(isT, isO, Elt, VTs);
+ N = newSDNode<ConstantSDNode>(isT, isO, Elt, VTs, DL.getDebugLoc());
CSEMap.InsertNode(N, IP);
InsertNode(N);
NewSDValueDbgMsg(SDValue(N, 0), "Creating constant: ", this);
diff --git a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
index 10762edc16264..355b97cdb9ee8 100644
--- a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
+++ b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
@@ -1179,16 +1179,17 @@ void SIWholeQuadMode::toExact(MachineBasicBlock &MBB,
}
}
+ const DebugLoc &DL = MBB.findDebugLoc(Before);
MachineInstr *MI;
if (SaveWQM) {
unsigned Opcode =
IsTerminator ? LMC.AndSaveExecTermOpc : LMC.AndSaveExecOpc;
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(Opcode), SaveWQM)
+ MI = BuildMI(MBB, Before, DL, TII->get(Opcode), SaveWQM)
.addReg(LiveMaskReg);
} else {
unsigned Opcode = IsTerminator ? LMC.AndTermOpc : LMC.AndOpc;
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(Opcode), LMC.ExecReg)
+ MI = BuildMI(MBB, Before, DL, TII->get(Opcode), LMC.ExecReg)
.addReg(LMC.ExecReg)
.addReg(LiveMaskReg);
}
@@ -1200,13 +1201,14 @@ void SIWholeQuadMode::toExact(MachineBasicBlock &MBB,
void SIWholeQuadMode::toWQM(MachineBasicBlock &MBB,
MachineBasicBlock::iterator Before,
Register SavedWQM) {
+ const DebugLoc &DL = MBB.findDebugLoc(Before);
MachineInstr *MI;
if (SavedWQM) {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), LMC.ExecReg)
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::COPY), LMC.ExecReg)
.addReg(SavedWQM);
} else {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(LMC.WQMOpc), LMC.ExecReg)
+ MI = BuildMI(MBB, Before, DL, TII->get(LMC.WQMOpc), LMC.ExecReg)
.addReg(LMC.ExecReg);
}
@@ -1222,12 +1224,14 @@ void SIWholeQuadMode::toStrictMode(MachineBasicBlock &MBB,
assert(StrictStateNeeded == StateStrictWWM ||
StrictStateNeeded == StateStrictWQM);
+ const DebugLoc &DL = MBB.findDebugLoc(Before);
+
if (StrictStateNeeded == StateStrictWWM) {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::ENTER_STRICT_WWM),
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::ENTER_STRICT_WWM),
SaveOrig)
.addImm(-1);
} else {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::ENTER_STRICT_WQM),
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::ENTER_STRICT_WQM),
SaveOrig)
.addImm(-1);
}
@@ -1245,12 +1249,14 @@ void SIWholeQuadMode::fromStrictMode(MachineBasicBlock &MBB,
assert(CurrentStrictState == StateStrictWWM ||
CurrentStrictState == StateStrictWQM);
+ const DebugLoc &DL = MBB.findDebugLoc(Before);
+
if (CurrentStrictState == StateStrictWWM) {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::EXIT_STRICT_WWM),
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::EXIT_STRICT_WWM),
LMC.ExecReg)
.addReg(SavedOrig);
} else {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::EXIT_STRICT_WQM),
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::EXIT_STRICT_WQM),
LMC.ExecReg)
.addReg(SavedOrig);
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/168573
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