[llvm] [AMDGPU][GlobalISel] Add regbankselect rules for G_FSHR (PR #159818)
Anshil Gandhi via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 17 21:08:57 PST 2025
https://github.com/gandhi56 updated https://github.com/llvm/llvm-project/pull/159818
>From 09f14b49fe4b1179493225baee09a4a3b07260c8 Mon Sep 17 00:00:00 2001
From: Anshil Gandhi <Anshil.Gandhi at amd.com>
Date: Fri, 19 Sep 2025 12:06:18 -0500
Subject: [PATCH] [AMDGPU] Add regbankselect rules for G_FSHR
---
llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
index 103cdec8233a0..83bc2a1446848 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
@@ -526,6 +526,9 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
.Div(S32, {{Vgpr32}, {Vgpr32, Vgpr32}})
.Div(S64, {{Vgpr64}, {Vgpr64, Vgpr32}});
+ addRulesForGOpcs({G_FSHR}, Standard)
+ .Div(S32, {{Vgpr32}, {Vgpr32, Vgpr32, Vgpr32}});
+
addRulesForGOpcs({G_FRAME_INDEX}).Any({{UniP5, _}, {{SgprP5}, {None}}});
addRulesForGOpcs({G_UBFX, G_SBFX}, Standard)
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