[llvm] [SPIRV] Enable DCE in instruction selection and update tests (PR #168428)

[Farzon Lotfi via llvm-commits]

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@@ -18,17 +18,37 @@
 ; CHECK-DAG: %[[Undef32:.*]] = OpUndef %[[IntTy]]
 ; CHECK-DAG: %[[UndefFloat:.*]] = OpUndef %[[FloatTy]]
 ; CHECK-DAG: %[[Const100]] = OpConstant %[[IntTy]] 100
-; CHECK: %[[Arg1]] = OpFunctionParameter %[[FloatTy]]
-; CHECK: %[[NotAStaticPoison]] = OpIAdd %[[ShortTy]] %[[Arg2]] %[[Undef16]]
 
-define spir_func void @foo(float %arg1, i16 %arg2) {
+define spir_func i16 @test_nil0(i16 %arg2) {
 entry:
+; CHECK: %[[NotAStaticPoison]] = OpIAdd %[[ShortTy]] %[[Arg2]] %[[Undef16]]
   %poison1 = add i16 %arg2, undef
   %nil0 = freeze i16 %poison1
+  ret i16 %nil0
+}
+
+define spir_func i32 @test_nil1() {
+entry:
   %nil1 = freeze i32 undef
+  ret i32 %nil1
+}
+
+define spir_func float @test_nil2() {
+entry:
   %nil2 = freeze float poison
+  ret float %nil2
+}
+
+define spir_func float @freeze_float(float %arg1) {
+entry:
+; CHECK: %[[Arg1]] = OpFunctionParameter %[[FloatTy]]
   %val1 = freeze float %arg1
+  ret float %val1
+}
+
+define spir_func i32 @foo() {
+entry:
   %val2 = freeze i32 100
   %val3 = freeze i32 %val2
-  ret void
-}
+  ret i32 %val3
+}
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farzonl wrote:

add a new line

https://github.com/llvm/llvm-project/pull/168428