[llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 18 03:54:22 PST 2025
================
@@ -58,70 +67,128 @@ def X86any_fmax : PatFrags<(ops node:$src1, node:$src2),
[(X86strict_fmax node:$src1, node:$src2),
(X86fmax node:$src1, node:$src2)]>;
+// Bitwise logical AND of floating point values. This corresponds
+// to X86::ANDPS or X86::ANDPD.
def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,
[SDNPCommutative, SDNPAssociative]>;
+
+// Bitwise logical OR of floating point values. This corresponds
+// to X86::ORPS or X86::ORPD.
def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,
[SDNPCommutative, SDNPAssociative]>;
+
+// Bitwise logical XOR of floating point values. This corresponds
+// to X86::XORPS or X86::XORPD.
def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
[SDNPCommutative, SDNPAssociative]>;
+
+// Bitwise logical ANDNOT of floating point values. This
+// corresponds to X86::ANDNPS or X86::ANDNPD.
def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp>;
+
+// Floating point reciprocal-sqrt and reciprocal approximation.
+// Note that these typically require refinement
+// in order to obtain suitable precision.
def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;
+
+// Floating point horizontal add/sub.
def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
+
+// Integer horizontal add/sub.
def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
+
+// X86 compare and logical compare instructions.
def X86comi : SDNode<"X86ISD::COMI", SDTX86FCmp>;
def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86FCmp>;
+
+// X86 compare with Intrinsics similar to COMI.
def X86comi512 : SDNode<"X86ISD::COMX", SDTX86FCmp>;
def X86ucomi512 : SDNode<"X86ISD::UCOMX", SDTX86FCmp>;
+
def SDTX86Cmps : SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisSameAs<0, 1>,
SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
+
+// X86 FP SETCC, implemented with CMP{cc}SS/CMP{cc}SD.
+// Operands are two FP values to compare; result is a mask of
+// 0s or 1s. Generally DTRT for C/C++ with NaNs.
def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
+// Shuffle 16 8-bit values within a vector.
def X86pshufb : SDNode<"X86ISD::PSHUFB",
SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i8>, SDTCisSameAs<0,1>,
SDTCisSameAs<0,2>]>>;
+
+// Compute Sum of Absolute Differences.
def X86psadbw : SDNode<"X86ISD::PSADBW",
SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i64>,
SDTCVecEltisVT<1, i8>,
SDTCisSameSizeAs<0,1>,
SDTCisSameAs<1,2>]>, [SDNPCommutative]>;
+
def SDTX86PSADBW : SDTypeProfile<1, 3, [SDTCVecEltisVT<0, i16>,
SDTCVecEltisVT<1, i8>,
SDTCisSameSizeAs<0,1>,
SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;
+
+// Compute Double Block Packed Sum-Absolute-Differences
def X86dbpsadbw : SDNode<"X86ISD::DBPSADBW", SDTX86PSADBW>;
+
+// Bitwise Logical AND NOT of Packed FP values.
def X86andnp : SDNode<"X86ISD::ANDNP",
SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
SDTCisSameAs<0,2>]>>;
+
def X86multishift : SDNode<"X86ISD::MULTISHIFT",
SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
SDTCisSameAs<1,2>]>>;
def X86pextrb : SDNode<"X86ISD::PEXTRB",
----------------
RKSimon wrote:
```
// Extract a 8-bit value from a vector and zero extend it to
// i32, corresponds to X86::PEXTRB.
```
https://github.com/llvm/llvm-project/pull/168421
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