[llvm] Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (PR #168353)

[Benjamin Maxwell via llvm-commits]

================
@@ -2046,6 +2139,37 @@ void RegisterCoalescer::setUndefOnPrunedSubRegUses(LiveInterval &LI,
   LIS->shrinkToUses(&LI);
 }
 
+/// For a given use of value \p Idx, it returns the def in the current block,
+/// or otherwise all possible defs in preceding blocks.
+static bool findPrecedingDefs(SmallVector<MachineInstr *> &Instrs,
+                              LiveIntervals *LIS, LiveInterval &SrcInt,
+                              MachineBasicBlock *MBB, VNInfo *Idx) {
+  auto IsPrecedingDef = [&](VNInfo *Idx) -> bool {
+    if (Idx->isPHIDef())
+      return false;
+    MachineInstr *Def = LIS->getInstructionFromIndex(Idx->def);
+    assert(Def && "Unable to find a def for SUBREG_TO_REG source operand");
+    Instrs.push_back(Def);
+    return true;
+  };
+
+  if (IsPrecedingDef(Idx))
+    return true;
+
+  SmallVector<MachineBasicBlock *> Worklist = {MBB};
+  SmallPtrSet<MachineBasicBlock *, 8> VisitedBlocks;
+  for (unsigned I = 0; I < Worklist.size(); ++I) {
+    if (VisitedBlocks.count(Worklist[I]))
+      continue;
+    VisitedBlocks.insert(Worklist[I]);
+    VNInfo *Idx = SrcInt.getVNInfoBefore(LIS->getMBBEndIdx(Worklist[I]));
+    if (!IsPrecedingDef(Idx))
+      Worklist.append(Worklist[I]->pred_begin(), Worklist[I]->pred_end());
+  }
----------------
MacDue wrote:

Not really seen it done like this before, I think the more usual way would be:
```suggestion
  while (!Worklist.empty()) {
    MachineBasicBlock* MBB = Worklist.pop_back_val();
    auto [_, Inserted] = VisitedBlocks.insert(MBB);
    if (!Inserted)
      continue;
    VNInfo *Idx = SrcInt.getVNInfoBefore(LIS->getMBBEndIdx(MBB));
    if (!IsPrecedingDef(Idx))
      Worklist.append(MBB->pred_begin(), MBB->pred_end());
  }
```
Which also prevents the worklist from continually growing. 

https://github.com/llvm/llvm-project/pull/168353