[llvm] [AArch64][GlobalISel] Improve lowering of vector fp16 fptrunc (PR #163398)

[David Green via llvm-commits]

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@@ -536,6 +536,12 @@ G_FPTRUNC
 
 Convert a floating point value to a narrower type.
 
+G_FPTRUNC_ODD
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davemgreen wrote:

> I am vetoing the new opcode. It is identical to FPTRUNC_ROUND with whatever immediate value corresponds to round odd
> It is not an AMDism, and you can set the legalize rule based on the immediate

By AMDism I just meant that it is only handled on AMD at the moment, and there isn't an instruction or very good lowering for it on AArch64.

Round to Odd isn't a standard ieee rounding mode, so is not something that llvm.fptrunc.round supports. It is similar to "to nearest, ties to even", but the ties go to odd, which apparently allows rounding f64->f16 via f32 without introducing double rounding errors. Adding support to FPTRUNC_ROUND just for this one case seems messy for the AArch64 backend, and is not the right direction to take.

https://github.com/llvm/llvm-project/pull/163398