[llvm] [APInt] Introduce carry-less multiply operation (PR #168527)

[Ramkumar Ramachandra via llvm-commits]

================
@@ -3187,3 +3187,11 @@ APInt llvm::APIntOps::fshr(const APInt &Hi, const APInt &Lo,
     return Lo;
   return Hi.shl(Hi.getBitWidth() - ShiftAmt) | Lo.lshr(ShiftAmt);
 }
+
+APInt llvm::APIntOps::clmul(const APInt &LHS, const APInt &RHS) {
+  assert(LHS.getBitWidth() == RHS.getBitWidth());
+  APInt Result(LHS.getBitWidth(), 0);
----------------
artagnon wrote:

Hm, I think I will introduce an llvm.clmul that returns a double-bitwidth result -- I will update the patch to include clmulr and clmulh primitives in APIntOps.

https://github.com/llvm/llvm-project/pull/168527