[llvm] [AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (PR #165953)
Jeremy Morse via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 13 00:52:32 PST 2025
================
@@ -2477,14 +2481,57 @@ Register AArch64InstrInfo::isStoreToStackSlot(const MachineInstr &MI,
case AArch64::STRDui:
case AArch64::STRQui:
case AArch64::STR_PXI:
- if (MI.getOperand(0).getSubReg() == 0 && MI.getOperand(1).isFI() &&
- MI.getOperand(2).isImm() && MI.getOperand(2).getImm() == 0) {
- FrameIndex = MI.getOperand(1).getIndex();
- return MI.getOperand(0).getReg();
- }
- break;
+ return true;
}
- return 0;
+}
+
+Register AArch64InstrInfo::isStoreToStackSlot(const MachineInstr &MI,
+ int &FrameIndex) const {
+ if (!isFrameStoreOpcode(MI.getOpcode()))
+ return Register();
+
+ if (MI.getOperand(0).getSubReg() == 0 && MI.getOperand(1).isFI() &&
+ MI.getOperand(2).isImm() && MI.getOperand(2).getImm() == 0) {
+ FrameIndex = MI.getOperand(1).getIndex();
+ return MI.getOperand(0).getReg();
+ }
+ return Register();
+}
+
+Register AArch64InstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI,
+ int &FrameIndex) const {
+ if (!isFrameStoreOpcode(MI.getOpcode()))
+ return Register();
+
+ if (Register Reg = isStoreToStackSlot(MI, FrameIndex))
+ return Reg;
+
+ SmallVector<const MachineMemOperand *, 1> Accesses;
+ if (hasStoreToStackSlot(MI, Accesses)) {
+ FrameIndex =
+ cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
+ ->getFrameIndex();
+ return MI.getOperand(0).getReg();
+ }
----------------
jmorse wrote:
I'm not familiar with aarch64; IIRC from when I looked at this ~3 years ago, there are multiple-stack-load and multiple-stack-store variants of instructions somewhere? If that's true and not a hallucination, best to add an exit path if there's more than one MachineMemOperand. Similar with the load function below.
https://github.com/llvm/llvm-project/pull/165953
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