[clang] [compiler-rt] [Clang][CodeGen] Add disable_sanitizer_instrumentation attribute to multiversion resolvers (PR #167516)
Benjamin Stott via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 11 07:01:32 PST 2025
https://github.com/BStott6 created https://github.com/llvm/llvm-project/pull/167516
- Fixes https://github.com/llvm/llvm-project/issues/163369
- Segmentation fault occurred because resolver was calling TSan instrumentation functions (__tsan_func_entry, __tsan_func_exit) but as the resolver is run by the dynamic linker at load time, TSan is not initialized yet so the current thread pointer is null.
- This PR adds the DisableSanitizerInstrumentation attribute to the multiversion function resolvers to avoid issues like this.
- Added regression test for TSan segfault.
>From d7f4973b3066649d47605f3d235d9f25f9d7e7ed Mon Sep 17 00:00:00 2001
From: BStott <Benjamin.Stott at sony.com>
Date: Tue, 11 Nov 2025 14:51:02 +0000
Subject: [PATCH 1/3] [Clang] Add disable_sanitizer_instrumentation attribute
to multiversion resolver functions
---
clang/lib/CodeGen/CodeGenModule.cpp | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp
index 0fea57b2e1799..eff00a8d1510b 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -4936,6 +4936,11 @@ void CodeGenModule::setMultiVersionResolverAttributes(llvm::Function *Resolver,
setDSOLocal(Resolver);
+ // The resolver must be exempt from sanitizer instrumentation, as it can run
+ // before the sanitizer is initialized.
+ // (https://github.com/llvm/llvm-project/issues/163369)
+ Resolver->addFnAttr(llvm::Attribute::DisableSanitizerInstrumentation);
+
// Set the default target-specific attributes, such as PAC and BTI ones on
// AArch64. Not passing Decl to prevent setting unrelated attributes,
// as Resolver can be shared by multiple declarations.
>From ed2a073441225031cb1158633370e270d891187e Mon Sep 17 00:00:00 2001
From: BStott <Benjamin.Stott at sony.com>
Date: Tue, 11 Nov 2025 14:51:20 +0000
Subject: [PATCH 2/3] Add test for TSan segfault
---
compiler-rt/test/tsan/target_clones_segfault.c | 10 ++++++++++
1 file changed, 10 insertions(+)
create mode 100644 compiler-rt/test/tsan/target_clones_segfault.c
diff --git a/compiler-rt/test/tsan/target_clones_segfault.c b/compiler-rt/test/tsan/target_clones_segfault.c
new file mode 100644
index 0000000000000..ac5aa48ca99b5
--- /dev/null
+++ b/compiler-rt/test/tsan/target_clones_segfault.c
@@ -0,0 +1,10 @@
+// https://github.com/llvm/llvm-project/issues/163369
+// RUN: %clang %s -fsanitize=thread -o %t
+// RUN: %t
+
+__attribute__((target_clones("default,avx"))) static int
+has_target_clones(void) {
+ return 0;
+}
+
+int main(void) { has_target_clones(); }
>From b247c5880a8ffbe63ac8d5192bf6a5ea60aaaab3 Mon Sep 17 00:00:00 2001
From: BStott <Benjamin.Stott at sony.com>
Date: Tue, 11 Nov 2025 14:51:29 +0000
Subject: [PATCH 3/3] Update test checks
---
clang/test/CodeGen/AArch64/fmv-detection.c | 2 +-
.../fmv-mix-explicit-implicit-default.c | 12 +-
clang/test/CodeGen/AArch64/fmv-priority.c | 6 +-
.../CodeGen/AArch64/fmv-resolver-emission.c | 22 ++-
.../CodeGen/AArch64/mixed-target-attributes.c | 9 +-
.../CodeGen/AArch64/resolver-attributes.c | 21 +--
clang/test/CodeGen/attr-cpuspecific.c | 49 +++---
.../test/CodeGen/attr-target-clones-aarch64.c | 38 +++--
clang/test/CodeGen/attr-target-clones-riscv.c | 27 ++--
clang/test/CodeGen/attr-target-clones.c | 47 +++---
clang/test/CodeGen/attr-target-mv-va-args.c | 10 +-
clang/test/CodeGen/attr-target-mv.c | 40 ++---
.../test/CodeGen/attr-target-version-riscv.c | 21 ++-
clang/test/CodeGenCXX/attr-cpuspecific.cpp | 12 +-
.../CodeGenCXX/attr-target-clones-aarch64.cpp | 6 +-
.../CodeGenCXX/attr-target-clones-riscv.cpp | 28 ++--
clang/test/CodeGenCXX/attr-target-clones.cpp | 143 +++++++-----------
.../CodeGenCXX/attr-target-mv-diff-ns.cpp | 8 +-
.../attr-target-mv-member-funcs.cpp | 3 +-
.../attr-target-mv-out-of-line-defs.cpp | 3 +-
.../CodeGenCXX/attr-target-mv-overloads.cpp | 6 +-
.../CodeGenCXX/attr-target-version-riscv.cpp | 21 ++-
clang/test/CodeGenCXX/attr-target-version.cpp | 19 ++-
clang/test/CodeGenCXX/fmv-namespace.cpp | 7 +-
24 files changed, 307 insertions(+), 253 deletions(-)
diff --git a/clang/test/CodeGen/AArch64/fmv-detection.c b/clang/test/CodeGen/AArch64/fmv-detection.c
index e585140a1eb08..a6761ffd4bb1e 100644
--- a/clang/test/CodeGen/AArch64/fmv-detection.c
+++ b/clang/test/CodeGen/AArch64/fmv-detection.c
@@ -437,7 +437,7 @@ int caller() {
// CHECK-NEXT: ret i32 [[CALL]]
//
//
-// CHECK-LABEL: define {{[^@]+}}@fmv.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@fmv.resolver() {{[#0-9]* }}comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
diff --git a/clang/test/CodeGen/AArch64/fmv-mix-explicit-implicit-default.c b/clang/test/CodeGen/AArch64/fmv-mix-explicit-implicit-default.c
index dcc5e1c5886e2..a6d6509ca7de0 100644
--- a/clang/test/CodeGen/AArch64/fmv-mix-explicit-implicit-default.c
+++ b/clang/test/CodeGen/AArch64/fmv-mix-explicit-implicit-default.c
@@ -107,22 +107,26 @@ int caller6(void) { return no_def_explicit_default_first(); }
// CHECK-NEXT: ret i32 [[CALL]]
//
//
-// CHECK-LABEL: define {{[^@]+}}@implicit_default_decl_first.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@implicit_default_decl_first.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: ret ptr @implicit_default_decl_first.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@explicit_default_def_first.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@explicit_default_def_first.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: ret ptr @explicit_default_def_first.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@implicit_default_def_first.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@implicit_default_def_first.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: ret ptr @implicit_default_def_first.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@explicit_default_decl_first.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@explicit_default_decl_first.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: ret ptr @explicit_default_decl_first.default
//
diff --git a/clang/test/CodeGen/AArch64/fmv-priority.c b/clang/test/CodeGen/AArch64/fmv-priority.c
index c92e0c4e9c3db..84c84df5a2fa0 100644
--- a/clang/test/CodeGen/AArch64/fmv-priority.c
+++ b/clang/test/CodeGen/AArch64/fmv-priority.c
@@ -2,13 +2,10 @@
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -emit-llvm -o - %s | FileCheck %s
// Priority biskmasks after feature dependency expansion:
-//
// MSB LSB
-//
// sme2 | wfxt | sme | bf16 | | | fp16 | simd | fp
// -----+------+-----+------+-------+------+------+------+---
// sme2 | | sme | bf16 | rcpc2 | rcpc | fp16 | simd | fp
-//
// Dependencies should not affect priorities, since a
// feature can only depend on lower priority features:
// https://github.com/ARM-software/acle/pull/376
@@ -32,7 +29,8 @@ int call() { return fn(); }
// CHECK-NEXT: ret i32 [[CALL]]
//
//
-// CHECK-LABEL: define weak_odr ptr @fn.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @fn.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
diff --git a/clang/test/CodeGen/AArch64/fmv-resolver-emission.c b/clang/test/CodeGen/AArch64/fmv-resolver-emission.c
index 591625d4d0da1..beebbb2166edf 100644
--- a/clang/test/CodeGen/AArch64/fmv-resolver-emission.c
+++ b/clang/test/CodeGen/AArch64/fmv-resolver-emission.c
@@ -258,7 +258,8 @@ __attribute__((target_clones("aes"))) void clones_without_default(void) {}
// CHECK-NEXT: ret void
//
//
-// CHECK-LABEL: define {{[^@]+}}@used_before_default_def.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@used_before_default_def.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -272,7 +273,8 @@ __attribute__((target_clones("aes"))) void clones_without_default(void) {}
// CHECK-NEXT: ret ptr @used_before_default_def.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@used_after_default_def.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@used_after_default_def.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -286,7 +288,8 @@ __attribute__((target_clones("aes"))) void clones_without_default(void) {}
// CHECK-NEXT: ret ptr @used_after_default_def.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@not_used_with_default.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@not_used_with_default.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -300,7 +303,8 @@ __attribute__((target_clones("aes"))) void clones_without_default(void) {}
// CHECK-NEXT: ret ptr @not_used_with_default.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@indirect_use.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@indirect_use.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -328,7 +332,8 @@ __attribute__((target_clones("aes"))) void clones_without_default(void) {}
// CHECK-NEXT: ret void
//
//
-// CHECK-LABEL: define {{[^@]+}}@internal_func.resolver() {
+// CHECK-LABEL: define {{[^@]+}}@internal_func.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -356,7 +361,8 @@ __attribute__((target_clones("aes"))) void clones_without_default(void) {}
// CHECK-NEXT: ret void
//
//
-// CHECK-LABEL: define {{[^@]+}}@linkonce_func.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@linkonce_func.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -370,7 +376,8 @@ __attribute__((target_clones("aes"))) void clones_without_default(void) {}
// CHECK-NEXT: ret ptr @linkonce_func.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@clones_with_default.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@clones_with_default.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -383,6 +390,7 @@ __attribute__((target_clones("aes"))) void clones_without_default(void) {}
// CHECK: resolver_else:
// CHECK-NEXT: ret ptr @clones_with_default.default
//
+// CHECK: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }
//.
// CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
// CHECK: [[META1:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}
diff --git a/clang/test/CodeGen/AArch64/mixed-target-attributes.c b/clang/test/CodeGen/AArch64/mixed-target-attributes.c
index ef47c8a3bc737..480c010b92d96 100644
--- a/clang/test/CodeGen/AArch64/mixed-target-attributes.c
+++ b/clang/test/CodeGen/AArch64/mixed-target-attributes.c
@@ -127,7 +127,8 @@ __attribute__((target_version("jscvt"))) int default_def_with_version_decls(void
// CHECK-NEXT: ret i32 0
//
//
-// CHECK-LABEL: define {{[^@]+}}@implicit_default.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@implicit_default.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -165,7 +166,8 @@ __attribute__((target_version("jscvt"))) int default_def_with_version_decls(void
// CHECK-NEXT: ret ptr @implicit_default.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@explicit_default.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@explicit_default.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -203,7 +205,8 @@ __attribute__((target_version("jscvt"))) int default_def_with_version_decls(void
// CHECK-NEXT: ret ptr @explicit_default.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@default_def_with_version_decls.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@default_def_with_version_decls.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
diff --git a/clang/test/CodeGen/AArch64/resolver-attributes.c b/clang/test/CodeGen/AArch64/resolver-attributes.c
index 6e4497cdc8611..b53da46354c34 100644
--- a/clang/test/CodeGen/AArch64/resolver-attributes.c
+++ b/clang/test/CodeGen/AArch64/resolver-attributes.c
@@ -46,17 +46,20 @@ __attribute__((ifunc("ifunc_resolver"))) int ifunc(void);
// BTI: define internal ptr @static_target_clones.resolver() #[[ATTR_RESOLVER]]
// BTI: define internal ptr @static_target_version.resolver() #[[ATTR_RESOLVER]]
-// In NOBTI case, no attribute groups are assigned to the resolver functions:
-// NOBTI: define weak_odr ptr @global_target_clones.resolver(){{( comdat)?}} {
-// NOBTI: define weak_odr ptr @global_target_version.resolver(){{( comdat)?}} {
-// NOBTI: define internal ptr @static_target_clones.resolver() {
-// NOBTI: define internal ptr @static_target_version.resolver() {
+// In NOBTI case, only "no_sanitizer_instrumentation" attributes are added to the resolver
-// HIDDEN: define weak_odr hidden ptr @global_target_clones.resolver(){{( comdat)?}} {
-// HIDDEN: define weak_odr hidden ptr @global_target_version.resolver(){{( comdat)?}} {
-// HIDDEN: define internal ptr @static_target_clones.resolver() {
-// HIDDEN: define internal ptr @static_target_version.resolver() {
+// NOBTI: define weak_odr ptr @global_target_clones.resolver() [[ATTR_RESOLVER:(#[0-9]+)?]]{{( comdat)?}}
+// NOBTI: define weak_odr ptr @global_target_version.resolver() [[ATTR_RESOLVER]]{{( comdat)?}}
+// NOBTI: define internal ptr @static_target_clones.resolver() [[ATTR_RESOLVER]]
+// NOBTI: define internal ptr @static_target_version.resolver() [[ATTR_RESOLVER]]
+
+// HIDDEN: define weak_odr hidden ptr @global_target_clones.resolver() [[ATTR_RESOLVER:(#[0-9]+)?]]{{( comdat)?}}
+// HIDDEN: define weak_odr hidden ptr @global_target_version.resolver() [[ATTR_RESOLVER]]{{( comdat)?}}
+// HIDDEN: define internal ptr @static_target_clones.resolver() [[ATTR_RESOLVER]]
+// HIDDEN: define internal ptr @static_target_version.resolver() [[ATTR_RESOLVER]]
// ELF: attributes #[[ATTR_IFUNC_RESOLVER]] = { {{.*}}"branch-target-enforcement"{{.*}} }
// BTI: attributes #[[ATTR_RESOLVER]] = { {{.*}}"branch-target-enforcement"{{.*}} }
+//
+// NOBTI: attributes [[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }
diff --git a/clang/test/CodeGen/attr-cpuspecific.c b/clang/test/CodeGen/attr-cpuspecific.c
index 44f51887be389..7d086adeef4bf 100644
--- a/clang/test/CodeGen/attr-cpuspecific.c
+++ b/clang/test/CodeGen/attr-cpuspecific.c
@@ -42,7 +42,7 @@ void SingleVersion(void){}
ATTR(cpu_dispatch(ivybridge))
void SingleVersion(void);
-// LINUX: define weak_odr ptr @SingleVersion.resolver()
+// LINUX: define weak_odr ptr @SingleVersion.resolver() #[[ATTR_RESOLVER:[0-9]+]]
// LINUX: call void @__cpu_indicator_init
// LINUX: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
// LINUX: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 525311
@@ -51,7 +51,7 @@ void SingleVersion(void);
// LINUX: call void @llvm.trap
// LINUX: unreachable
-// WINDOWS: define weak_odr dso_local void @SingleVersion() comdat
+// WINDOWS: define weak_odr dso_local void @SingleVersion() #[[ATTR_RESOLVER:[0-9]+]] comdat
// WINDOWS: call void @__cpu_indicator_init()
// WINDOWS: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
// WINDOWS: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 525311
@@ -72,7 +72,7 @@ void TwoVersions(void);
ATTR(cpu_dispatch(ivybridge, knl))
void TwoVersions(void);
-// LINUX: define weak_odr ptr @TwoVersions.resolver()
+// LINUX: define weak_odr ptr @TwoVersions.resolver() #[[ATTR_RESOLVER]]
// LINUX: call void @__cpu_indicator_init
// LINUX: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
// LINUX: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 9422847
@@ -82,7 +82,7 @@ void TwoVersions(void);
// LINUX: call void @llvm.trap
// LINUX: unreachable
-// WINDOWS: define weak_odr dso_local void @TwoVersions() comdat
+// WINDOWS: define weak_odr dso_local void @TwoVersions() #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init()
// WINDOWS: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
// WINDOWS: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 9422847
@@ -119,13 +119,13 @@ void CpuSpecificNoDispatch(void) {}
ATTR(cpu_dispatch(knl))
void OrderDispatchUsageSpecific(void);
-// LINUX: define weak_odr ptr @OrderDispatchUsageSpecific.resolver()
+// LINUX: define weak_odr ptr @OrderDispatchUsageSpecific.resolver() #[[ATTR_RESOLVER]]
// LINUX: call void @__cpu_indicator_init
// LINUX: ret ptr @OrderDispatchUsageSpecific.Z
// LINUX: call void @llvm.trap
// LINUX: unreachable
-// WINDOWS: define weak_odr dso_local void @OrderDispatchUsageSpecific() comdat
+// WINDOWS: define weak_odr dso_local void @OrderDispatchUsageSpecific() #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init()
// WINDOWS: call void @OrderDispatchUsageSpecific.Z()
// WINDOWS-NEXT: ret void
@@ -173,14 +173,14 @@ void usages(void) {
// has an extra config to emit!
ATTR(cpu_dispatch(ivybridge, knl, atom))
void TwoVersionsSameAttr(void);
-// LINUX: define weak_odr ptr @TwoVersionsSameAttr.resolver()
+// LINUX: define weak_odr ptr @TwoVersionsSameAttr.resolver() #[[ATTR_RESOLVER]]
// LINUX: ret ptr @TwoVersionsSameAttr.Z
// LINUX: ret ptr @TwoVersionsSameAttr.S
// LINUX: ret ptr @TwoVersionsSameAttr.O
// LINUX: call void @llvm.trap
// LINUX: unreachable
-// WINDOWS: define weak_odr dso_local void @TwoVersionsSameAttr() comdat
+// WINDOWS: define weak_odr dso_local void @TwoVersionsSameAttr() #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @TwoVersionsSameAttr.Z
// WINDOWS-NEXT: ret void
// WINDOWS: call void @TwoVersionsSameAttr.S
@@ -192,7 +192,7 @@ void TwoVersionsSameAttr(void);
ATTR(cpu_dispatch(atom, ivybridge, knl))
void ThreeVersionsSameAttr(void){}
-// LINUX: define weak_odr ptr @ThreeVersionsSameAttr.resolver()
+// LINUX: define weak_odr ptr @ThreeVersionsSameAttr.resolver() #[[ATTR_RESOLVER]]
// LINUX: call void @__cpu_indicator_init
// LINUX: ret ptr @ThreeVersionsSameAttr.Z
// LINUX: ret ptr @ThreeVersionsSameAttr.S
@@ -200,7 +200,7 @@ void ThreeVersionsSameAttr(void){}
// LINUX: call void @llvm.trap
// LINUX: unreachable
-// WINDOWS: define weak_odr dso_local void @ThreeVersionsSameAttr() comdat
+// WINDOWS: define weak_odr dso_local void @ThreeVersionsSameAttr() #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init
// WINDOWS: call void @ThreeVersionsSameAttr.Z
// WINDOWS-NEXT: ret void
@@ -213,10 +213,10 @@ void ThreeVersionsSameAttr(void){}
ATTR(cpu_dispatch(knl))
void OrderSpecificUsageDispatch(void);
-// LINUX: define weak_odr ptr @OrderSpecificUsageDispatch.resolver()
+// LINUX: define weak_odr ptr @OrderSpecificUsageDispatch.resolver() #[[ATTR_RESOLVER]]
// LINUX: ret ptr @OrderSpecificUsageDispatch.Z
-// WINDOWS: define weak_odr dso_local void @OrderSpecificUsageDispatch() comdat
+// WINDOWS: define weak_odr dso_local void @OrderSpecificUsageDispatch() #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init
// WINDOWS: call void @OrderSpecificUsageDispatch.Z
// WINDOWS-NEXT: ret void
@@ -224,7 +224,7 @@ void OrderSpecificUsageDispatch(void);
// No Cpu Specific options.
ATTR(cpu_dispatch(atom, ivybridge, knl))
void NoSpecifics(void);
-// LINUX: define weak_odr ptr @NoSpecifics.resolver()
+// LINUX: define weak_odr ptr @NoSpecifics.resolver() #[[ATTR_RESOLVER]]
// LINUX: call void @__cpu_indicator_init
// LINUX: ret ptr @NoSpecifics.Z
// LINUX: ret ptr @NoSpecifics.S
@@ -232,7 +232,7 @@ void NoSpecifics(void);
// LINUX: call void @llvm.trap
// LINUX: unreachable
-// WINDOWS: define weak_odr dso_local void @NoSpecifics() comdat
+// WINDOWS: define weak_odr dso_local void @NoSpecifics() #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init
// WINDOWS: call void @NoSpecifics.Z
// WINDOWS-NEXT: ret void
@@ -245,7 +245,7 @@ void NoSpecifics(void);
ATTR(cpu_dispatch(atom, generic, ivybridge, knl))
void HasGeneric(void);
-// LINUX: define weak_odr ptr @HasGeneric.resolver()
+// LINUX: define weak_odr ptr @HasGeneric.resolver() #[[ATTR_RESOLVER]]
// LINUX: call void @__cpu_indicator_init
// LINUX: ret ptr @HasGeneric.Z
// LINUX: ret ptr @HasGeneric.S
@@ -253,7 +253,7 @@ void HasGeneric(void);
// LINUX: ret ptr @HasGeneric.A
// LINUX-NOT: call void @llvm.trap
-// WINDOWS: define weak_odr dso_local void @HasGeneric() comdat
+// WINDOWS: define weak_odr dso_local void @HasGeneric() #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init
// WINDOWS: call void @HasGeneric.Z
// WINDOWS-NEXT: ret void
@@ -267,7 +267,7 @@ void HasGeneric(void);
ATTR(cpu_dispatch(atom, generic, ivybridge, knl))
void HasParams(int i, double d);
-// LINUX: define weak_odr ptr @HasParams.resolver()
+// LINUX: define weak_odr ptr @HasParams.resolver() #[[ATTR_RESOLVER]]
// LINUX: call void @__cpu_indicator_init
// LINUX: ret ptr @HasParams.Z
// LINUX: ret ptr @HasParams.S
@@ -275,7 +275,7 @@ void HasParams(int i, double d);
// LINUX: ret ptr @HasParams.A
// LINUX-NOT: call void @llvm.trap
-// WINDOWS: define weak_odr dso_local void @HasParams(i32 %0, double %1) comdat
+// WINDOWS: define weak_odr dso_local void @HasParams(i32 %0, double %1) #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init
// WINDOWS: call void @HasParams.Z(i32 %0, double %1)
// WINDOWS-NEXT: ret void
@@ -289,7 +289,7 @@ void HasParams(int i, double d);
ATTR(cpu_dispatch(atom, generic, ivybridge, knl))
int HasParamsAndReturn(int i, double d);
-// LINUX: define weak_odr ptr @HasParamsAndReturn.resolver()
+// LINUX: define weak_odr ptr @HasParamsAndReturn.resolver() #[[ATTR_RESOLVER]]
// LINUX: call void @__cpu_indicator_init
// LINUX: ret ptr @HasParamsAndReturn.Z
// LINUX: ret ptr @HasParamsAndReturn.S
@@ -297,7 +297,7 @@ int HasParamsAndReturn(int i, double d);
// LINUX: ret ptr @HasParamsAndReturn.A
// LINUX-NOT: call void @llvm.trap
-// WINDOWS: define weak_odr dso_local i32 @HasParamsAndReturn(i32 %0, double %1) comdat
+// WINDOWS: define weak_odr dso_local i32 @HasParamsAndReturn(i32 %0, double %1) #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init
// WINDOWS: %[[RET:.+]] = musttail call i32 @HasParamsAndReturn.Z(i32 %0, double %1)
// WINDOWS-NEXT: ret i32 %[[RET]]
@@ -311,14 +311,14 @@ int HasParamsAndReturn(int i, double d);
ATTR(cpu_dispatch(atom, generic, pentium))
int GenericAndPentium(int i, double d);
-// LINUX: define weak_odr ptr @GenericAndPentium.resolver()
+// LINUX: define weak_odr ptr @GenericAndPentium.resolver() #[[ATTR_RESOLVER]]
// LINUX: call void @__cpu_indicator_init
// LINUX: ret ptr @GenericAndPentium.O
// LINUX: ret ptr @GenericAndPentium.B
// LINUX-NOT: ret ptr @GenericAndPentium.A
// LINUX-NOT: call void @llvm.trap
-// WINDOWS: define weak_odr dso_local i32 @GenericAndPentium(i32 %0, double %1) comdat
+// WINDOWS: define weak_odr dso_local i32 @GenericAndPentium(i32 %0, double %1) #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init
// WINDOWS: %[[RET:.+]] = musttail call i32 @GenericAndPentium.O(i32 %0, double %1)
// WINDOWS-NEXT: ret i32 %[[RET]]
@@ -329,11 +329,11 @@ int GenericAndPentium(int i, double d);
ATTR(cpu_dispatch(atom, pentium))
int DispatchFirst(void);
-// LINUX: define weak_odr ptr @DispatchFirst.resolver
+// LINUX: define weak_odr ptr @DispatchFirst.resolver() #[[ATTR_RESOLVER]]
// LINUX: ret ptr @DispatchFirst.O
// LINUX: ret ptr @DispatchFirst.B
-// WINDOWS: define weak_odr dso_local i32 @DispatchFirst() comdat
+// WINDOWS: define weak_odr dso_local i32 @DispatchFirst() #[[ATTR_RESOLVER]] comdat
// WINDOWS: %[[RET:.+]] = musttail call i32 @DispatchFirst.O()
// WINDOWS-NEXT: ret i32 %[[RET]]
// WINDOWS: %[[RET:.+]] = musttail call i32 @DispatchFirst.B()
@@ -360,6 +360,7 @@ void OrderDispatchUsageSpecific(void) {}
// CHECK: attributes #[[S]] = {{.*}}"target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"
// CHECK-SAME: "tune-cpu"="ivybridge"
+// CHECK: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }
// CHECK: attributes #[[K]] = {{.*}}"target-features"="+adx,+aes,+avx,+avx2,+avx512cd,+avx512f,+bmi,+bmi2,+cmov,+crc32,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"
// CHECK-SAME: "tune-cpu"="knl"
// CHECK: attributes #[[O]] = {{.*}}"target-features"="+cmov,+cx16,+cx8,+fxsr,+mmx,+movbe,+sahf,+sse,+sse2,+sse3,+ssse3,+x87"
diff --git a/clang/test/CodeGen/attr-target-clones-aarch64.c b/clang/test/CodeGen/attr-target-clones-aarch64.c
index 57add8b8c8abc..f790273e02aa8 100644
--- a/clang/test/CodeGen/attr-target-clones-aarch64.c
+++ b/clang/test/CodeGen/attr-target-clones-aarch64.c
@@ -172,7 +172,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-NEXT: ret i32 [[ADD5]]
//
//
-// CHECK-LABEL: define {{[^@]+}}@ftc_def.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@ftc_def.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -194,7 +195,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-NEXT: ret ptr @ftc_def.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@ftc_dup1.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@ftc_dup1.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -208,7 +210,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-NEXT: ret ptr @ftc_dup1.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@ftc_dup2.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@ftc_dup2.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -230,7 +233,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-NEXT: ret ptr @ftc_dup2.default
//
//
-// CHECK-LABEL: define {{[^@]+}}@ftc_dup3.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@ftc_dup3.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -273,7 +277,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-NEXT: ret i32 2
//
//
-// CHECK-LABEL: define {{[^@]+}}@ftc_inline2.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@ftc_inline2.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -337,7 +342,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-NEXT: ret i32 3
//
//
-// CHECK-LABEL: define {{[^@]+}}@ftc_inline3.resolver() comdat {
+// CHECK-LABEL: define {{[^@]+}}@ftc_inline3.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -563,7 +569,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-MTE-BTI-NEXT: ret i32 [[ADD5]]
//
//
-// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_def.resolver() comdat {
+// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_def.resolver()
+// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-MTE-BTI-NEXT: resolver_entry:
// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()
// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -585,7 +592,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-MTE-BTI-NEXT: ret ptr @ftc_def.default
//
//
-// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup1.resolver() comdat {
+// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup1.resolver()
+// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-MTE-BTI-NEXT: resolver_entry:
// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()
// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -599,7 +607,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-MTE-BTI-NEXT: ret ptr @ftc_dup1.default
//
//
-// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup2.resolver() comdat {
+// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup2.resolver()
+// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-MTE-BTI-NEXT: resolver_entry:
// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()
// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -621,7 +630,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-MTE-BTI-NEXT: ret ptr @ftc_dup2.default
//
//
-// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup3.resolver() comdat {
+// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup3.resolver()
+// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-MTE-BTI-NEXT: resolver_entry:
// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()
// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -664,7 +674,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-MTE-BTI-NEXT: ret i32 2
//
//
-// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline2.resolver() comdat {
+// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline2.resolver()
+// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-MTE-BTI-NEXT: resolver_entry:
// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()
// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -728,7 +739,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-MTE-BTI-NEXT: ret i32 3
//
//
-// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline3.resolver() comdat {
+// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline3.resolver()
+// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-MTE-BTI-NEXT: resolver_entry:
// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()
// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -749,6 +761,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))
// CHECK-MTE-BTI: resolver_else2:
// CHECK-MTE-BTI-NEXT: ret ptr @ftc_inline3.default
//
+// CHECK: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }
+// CHECK-MTE-BTI: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }
//.
// CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
// CHECK: [[META1:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}
diff --git a/clang/test/CodeGen/attr-target-clones-riscv.c b/clang/test/CodeGen/attr-target-clones-riscv.c
index 642302ba9d229..77e935127313f 100644
--- a/clang/test/CodeGen/attr-target-clones-riscv.c
+++ b/clang/test/CodeGen/attr-target-clones-riscv.c
@@ -53,7 +53,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7()
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @foo1.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo1.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -84,7 +85,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7()
// CHECK-NEXT: ret i32 2
//
//
-// CHECK-LABEL: define weak_odr ptr @foo2.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo2.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -116,7 +118,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7()
// CHECK-NEXT: ret i32 3
//
//
-// CHECK-LABEL: define weak_odr ptr @foo3.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo3.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -141,7 +144,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7()
// CHECK-NEXT: ret i32 4
//
//
-// CHECK-LABEL: define weak_odr ptr @foo4.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo4.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -160,7 +164,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7()
// CHECK-NEXT: ret i32 5
//
//
-// CHECK-LABEL: define weak_odr ptr @foo5.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo5.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: ret ptr @foo5.default
@@ -178,7 +183,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7()
// CHECK-NEXT: ret i32 2
//
//
-// CHECK-LABEL: define weak_odr ptr @foo6.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo6.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -215,7 +221,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7()
// CHECK-NEXT: ret i32 2
//
//
-// CHECK-LABEL: define weak_odr ptr @foo7.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo7.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -266,7 +273,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7()
// CHECK-NEXT: ret i32 2
//
//
-// CHECK-LABEL: define weak_odr ptr @foo8.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo8.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -317,7 +325,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7()
// CHECK-NEXT: ret i32 2
//
//
-// CHECK-LABEL: define weak_odr ptr @foo9.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo9.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
diff --git a/clang/test/CodeGen/attr-target-clones.c b/clang/test/CodeGen/attr-target-clones.c
index 3256db061f9a2..295b25d6478eb 100644
--- a/clang/test/CodeGen/attr-target-clones.c
+++ b/clang/test/CodeGen/attr-target-clones.c
@@ -44,45 +44,45 @@
static int __attribute__((target_clones("sse4.2, default"))) internal(void) { return 0; }
int use(void) { return internal(); }
/// Internal linkage resolvers do not use comdat.
-// LINUX: define internal ptr @internal.resolver() {
-// DARWIN: define internal ptr @internal.resolver() {
-// WINDOWS: define internal i32 @internal() {
+// LINUX: define internal ptr @internal.resolver() #[[ATTR_RESOLVER:[0-9]+]] {
+// DARWIN: define internal ptr @internal.resolver() #[[ATTR_RESOLVER:[0-9]+]] {
+// WINDOWS: define internal i32 @internal() #[[ATTR_RESOLVER:[0-9]+]] {
int __attribute__((target_clones("sse4.2, default"))) foo(void) { return 0; }
// LINUX: define {{.*}}i32 @foo.sse4.2.0()
// LINUX: define {{.*}}i32 @foo.default.1()
-// LINUX: define weak_odr ptr @foo.resolver() comdat
+// LINUX: define weak_odr ptr @foo.resolver() #[[ATTR_RESOLVER]] comdat
// LINUX: ret ptr @foo.sse4.2.0
// LINUX: ret ptr @foo.default.1
// DARWIN: define {{.*}}i32 @foo.sse4.2.0()
// DARWIN: define {{.*}}i32 @foo.default.1()
-// DARWIN: define weak_odr ptr @foo.resolver() {
+// DARWIN: define weak_odr ptr @foo.resolver() #[[ATTR_RESOLVER]] {
// DARWIN: ret ptr @foo.sse4.2.0
// DARWIN: ret ptr @foo.default.1
// WINDOWS: define dso_local i32 @foo.sse4.2.0()
// WINDOWS: define dso_local i32 @foo.default.1()
-// WINDOWS: define weak_odr dso_local i32 @foo() comdat
+// WINDOWS: define weak_odr dso_local i32 @foo() #[[ATTR_RESOLVER]] comdat
// WINDOWS: musttail call i32 @foo.sse4.2.0
// WINDOWS: musttail call i32 @foo.default.1
__attribute__((target_clones("default,default ,sse4.2"))) void foo_dupes(void) {}
// LINUX: define {{.*}}void @foo_dupes.default.1()
// LINUX: define {{.*}}void @foo_dupes.sse4.2.0()
-// LINUX: define weak_odr ptr @foo_dupes.resolver() comdat
+// LINUX: define weak_odr ptr @foo_dupes.resolver() #[[ATTR_RESOLVER]] comdat
// LINUX: ret ptr @foo_dupes.sse4.2.0
// LINUX: ret ptr @foo_dupes.default.1
// DARWIN: define {{.*}}void @foo_dupes.default.1()
// DARWIN: define {{.*}}void @foo_dupes.sse4.2.0()
-// DARWIN: define weak_odr ptr @foo_dupes.resolver() {
+// DARWIN: define weak_odr ptr @foo_dupes.resolver() #[[ATTR_RESOLVER]] {
// DARWIN: ret ptr @foo_dupes.sse4.2.0
// DARWIN: ret ptr @foo_dupes.default.1
// WINDOWS: define dso_local void @foo_dupes.default.1()
// WINDOWS: define dso_local void @foo_dupes.sse4.2.0()
-// WINDOWS: define weak_odr dso_local void @foo_dupes() comdat
+// WINDOWS: define weak_odr dso_local void @foo_dupes() #[[ATTR_RESOLVER]] comdat
// WINDOWS: musttail call void @foo_dupes.sse4.2.0
// WINDOWS: musttail call void @foo_dupes.default.1
@@ -109,19 +109,19 @@ int bar(void) {
void __attribute__((target_clones("default, arch=ivybridge"))) unused(void) {}
// LINUX: define {{.*}}void @unused.default.1()
// LINUX: define {{.*}}void @unused.arch_ivybridge.0()
-// LINUX: define weak_odr ptr @unused.resolver() comdat
+// LINUX: define weak_odr ptr @unused.resolver() #[[ATTR_RESOLVER]] comdat
// LINUX: ret ptr @unused.arch_ivybridge.0
// LINUX: ret ptr @unused.default.1
// DARWIN: define {{.*}}void @unused.default.1()
// DARWIN: define {{.*}}void @unused.arch_ivybridge.0()
-// DARWIN: define weak_odr ptr @unused.resolver() {
+// DARWIN: define weak_odr ptr @unused.resolver() #[[ATTR_RESOLVER]] {
// DARWIN: ret ptr @unused.arch_ivybridge.0
// DARWIN: ret ptr @unused.default.1
// WINDOWS: define dso_local void @unused.default.1()
// WINDOWS: define dso_local void @unused.arch_ivybridge.0()
-// WINDOWS: define weak_odr dso_local void @unused() comdat
+// WINDOWS: define weak_odr dso_local void @unused() #[[ATTR_RESOLVER]] comdat
// WINDOWS: musttail call void @unused.arch_ivybridge.0
// WINDOWS: musttail call void @unused.default.1
@@ -144,34 +144,34 @@ int bar3(void) {
// WINDOWS: call i32 @foo_inline2()
}
-// LINUX: define weak_odr ptr @foo_inline.resolver() comdat
+// LINUX: define weak_odr ptr @foo_inline.resolver() #[[ATTR_RESOLVER]] comdat
// LINUX: ret ptr @foo_inline.arch_sandybridge.0
// LINUX: ret ptr @foo_inline.sse4.2.1
// LINUX: ret ptr @foo_inline.default.2
-// DARWIN: define weak_odr ptr @foo_inline.resolver() {
+// DARWIN: define weak_odr ptr @foo_inline.resolver() #[[ATTR_RESOLVER]] {
// DARWIN: ret ptr @foo_inline.arch_sandybridge.0
// DARWIN: ret ptr @foo_inline.sse4.2.1
// DARWIN: ret ptr @foo_inline.default.2
-// WINDOWS: define weak_odr dso_local i32 @foo_inline() comdat
+// WINDOWS: define weak_odr dso_local i32 @foo_inline() #[[ATTR_RESOLVER]] comdat
// WINDOWS: musttail call i32 @foo_inline.arch_sandybridge.0
// WINDOWS: musttail call i32 @foo_inline.sse4.2.1
// WINDOWS: musttail call i32 @foo_inline.default.2
inline int __attribute__((target_clones("arch=sandybridge,default,sse4.2")))
foo_inline2(void){ return 0; }
-// LINUX: define weak_odr ptr @foo_inline2.resolver() comdat
+// LINUX: define weak_odr ptr @foo_inline2.resolver() #[[ATTR_RESOLVER]] comdat
// LINUX: ret ptr @foo_inline2.arch_sandybridge.0
// LINUX: ret ptr @foo_inline2.sse4.2.1
// LINUX: ret ptr @foo_inline2.default.2
-// DARWIN: define weak_odr ptr @foo_inline2.resolver() {
+// DARWIN: define weak_odr ptr @foo_inline2.resolver() #[[ATTR_RESOLVER]] {
// DARWIN: ret ptr @foo_inline2.arch_sandybridge.0
// DARWIN: ret ptr @foo_inline2.sse4.2.1
// DARWIN: ret ptr @foo_inline2.default.2
-// WINDOWS: define weak_odr dso_local i32 @foo_inline2() comdat
+// WINDOWS: define weak_odr dso_local i32 @foo_inline2() #[[ATTR_RESOLVER]] comdat
// WINDOWS: musttail call i32 @foo_inline2.arch_sandybridge.0
// WINDOWS: musttail call i32 @foo_inline2.sse4.2.1
// WINDOWS: musttail call i32 @foo_inline2.default.2
@@ -194,15 +194,15 @@ int test_foo_used_no_defn(void) {
}
-// LINUX: define weak_odr ptr @foo_used_no_defn.resolver() comdat
+// LINUX: define weak_odr ptr @foo_used_no_defn.resolver() #[[ATTR_RESOLVER]] comdat
// LINUX: ret ptr @foo_used_no_defn.sse4.2.0
// LINUX: ret ptr @foo_used_no_defn.default.1
-// DARWIN: define weak_odr ptr @foo_used_no_defn.resolver() {
+// DARWIN: define weak_odr ptr @foo_used_no_defn.resolver() #[[ATTR_RESOLVER]] {
// DARWIN: ret ptr @foo_used_no_defn.sse4.2.0
// DARWIN: ret ptr @foo_used_no_defn.default.1
-// WINDOWS: define weak_odr dso_local i32 @foo_used_no_defn() comdat
+// WINDOWS: define weak_odr dso_local i32 @foo_used_no_defn() #[[ATTR_RESOLVER]] comdat
// WINDOWS: musttail call i32 @foo_used_no_defn.sse4.2.0
// WINDOWS: musttail call i32 @foo_used_no_defn.default.1
@@ -213,7 +213,7 @@ int isa_level(int) { return 0; }
// LINUX: define{{.*}} i32 @isa_level.arch_x86-64-v2.1(
// LINUX: define{{.*}} i32 @isa_level.arch_x86-64-v3.2(
// LINUX: define{{.*}} i32 @isa_level.arch_x86-64-v4.3(
-// LINUX: define weak_odr ptr @isa_level.resolver() comdat
+// LINUX: define weak_odr ptr @isa_level.resolver() #[[ATTR_RESOLVER]] comdat
// LINUX: call void @__cpu_indicator_init()
// LINUX-NEXT: load i32, ptr getelementptr inbounds ([3 x i32], ptr @__cpu_features2, i32 0, i32 2)
// LINUX-NEXT: and i32 %[[#]], 4
@@ -234,7 +234,7 @@ int isa_level(int) { return 0; }
// DARWIN: define{{.*}} i32 @isa_level.arch_x86-64-v2.1(
// DARWIN: define{{.*}} i32 @isa_level.arch_x86-64-v3.2(
// DARWIN: define{{.*}} i32 @isa_level.arch_x86-64-v4.3(
-// DARWIN: define weak_odr ptr @isa_level.resolver() {
+// DARWIN: define weak_odr ptr @isa_level.resolver() #[[ATTR_RESOLVER]] {
// DARWIN: call void @__cpu_indicator_init()
// DARWIN-NEXT: load i32, ptr getelementptr inbounds ([3 x i32], ptr @__cpu_features2, i32 0, i32 2)
// DARWIN-NEXT: and i32 %[[#]], 4
@@ -288,6 +288,7 @@ int isa_level(int) { return 0; }
// WINDOWS: declare dso_local i32 @foo_used_no_defn.sse4.2.0()
+// CHECK: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }
// CHECK: attributes #[[SSE42]] =
// CHECK-SAME: "target-features"="+crc32,+cx8,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"
// CHECK: attributes #[[SB]] =
diff --git a/clang/test/CodeGen/attr-target-mv-va-args.c b/clang/test/CodeGen/attr-target-mv-va-args.c
index dbf5a74205c4c..e8238dac8f310 100644
--- a/clang/test/CodeGen/attr-target-mv-va-args.c
+++ b/clang/test/CodeGen/attr-target-mv-va-args.c
@@ -24,7 +24,7 @@ int bar(void) {
// IFUNC-ELF: call i32 (i32, ...) @foo.ifunc(i32 noundef 1, i32 noundef 97, double
// IFUNC-ELF: call i32 (i32, ...) @foo.ifunc(i32 noundef 2, double noundef 2.2{{[0-9Ee+]+}}, ptr noundef
-// IFUNC-ELF: define weak_odr ptr @foo.resolver() comdat
+// IFUNC-ELF: define weak_odr ptr @foo.resolver() #{{[0-9]+}} comdat
// IFUNC-ELF: ret ptr @foo.arch_sandybridge
// IFUNC-ELF: ret ptr @foo.arch_ivybridge
// IFUNC-ELF: ret ptr @foo.sse4.2
@@ -42,7 +42,7 @@ int bar(void) {
// IFUNC-MACHO: call i32 (i32, ...) @foo.ifunc(i32 noundef 1, i32 noundef 97, double
// IFUNC-MACHO: call i32 (i32, ...) @foo.ifunc(i32 noundef 2, double noundef 2.2{{[0-9Ee+]+}}, ptr noundef
-// IFUNC-MACHO: define weak_odr ptr @foo.resolver()
+// IFUNC-MACHO: define weak_odr ptr @foo.resolver() #{{[0-9]+}}
// IFUNC-MACHO: ret ptr @foo.arch_sandybridge
// IFUNC-MACHO: ret ptr @foo.arch_ivybridge
// IFUNC-MACHO: ret ptr @foo.sse4.2
@@ -55,12 +55,12 @@ int bar(void) {
// NO-IFUNC: ret i32 1
// NO-IFUNC: define dso_local i32 @foo(i32 noundef %i, ...)
// NO-IFUNC: ret i32 2
-// NO-IFUNC: define dso_local i32 @bar()
+// NO-IFUNC: define dso_local i32 @bar()
// NO-IFUNC: call i32 (i32, ...) @foo.resolver(i32 noundef 1, i32 noundef 97, double
// NO-IFUNC: call i32 (i32, ...) @foo.resolver(i32 noundef 2, double noundef 2.2{{[0-9Ee+]+}}, ptr noundef
-// WINDOWS: define weak_odr dso_local i32 @foo.resolver(i32 %0, ...) comdat
-// NO-IFUNC-ELF: define weak_odr i32 @foo.resolver(i32 %0, ...) comdat
+// WINDOWS: define weak_odr dso_local i32 @foo.resolver(i32 %0, ...) #{{[0-9]+}} comdat
+// NO-IFUNC-ELF: define weak_odr i32 @foo.resolver(i32 %0, ...) #{{[0-9]+}} comdat
// NO-IFUNC: musttail call i32 (i32, ...) @foo.arch_sandybridge
// NO-IFUNC: musttail call i32 (i32, ...) @foo.arch_ivybridge
// NO-IFUNC: musttail call i32 (i32, ...) @foo.sse4.2
diff --git a/clang/test/CodeGen/attr-target-mv.c b/clang/test/CodeGen/attr-target-mv.c
index b8807dd9171d5..4ab5d6f950ccd 100644
--- a/clang/test/CodeGen/attr-target-mv.c
+++ b/clang/test/CodeGen/attr-target-mv.c
@@ -1,6 +1,6 @@
-// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefixes=ITANIUM,LINUX
-// RUN: %clang_cc1 -triple x86_64-apple-macos -emit-llvm %s -o - | FileCheck %s --check-prefixes=ITANIUM,DARWIN
-// RUN: %clang_cc1 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,ITANIUM,LINUX
+// RUN: %clang_cc1 -triple x86_64-apple-macos -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,ITANIUM,DARWIN
+// RUN: %clang_cc1 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,WINDOWS
int __attribute__((target("sse4.2"))) foo(void) { return 0; }
int __attribute__((target("arch=sandybridge"))) foo(void);
@@ -277,7 +277,7 @@ void calls_pr50025c(void) { pr50025c(); }
// WINDOWS: define dso_local i32 @bar()
// WINDOWS: call i32 @foo.resolver()
-// ITANIUM: define weak_odr ptr @foo.resolver()
+// ITANIUM: define weak_odr ptr @foo.resolver() #[[ATTR_RESOLVER:[0-9]+]]
// LINUX-SAME: comdat
// ITANIUM: call void @__cpu_indicator_init()
// ITANIUM: ret ptr @foo.arch_sandybridge
@@ -285,7 +285,7 @@ void calls_pr50025c(void) { pr50025c(); }
// ITANIUM: ret ptr @foo.sse4.2
// ITANIUM: ret ptr @foo
-// WINDOWS: define weak_odr dso_local i32 @foo.resolver() comdat
+// WINDOWS: define weak_odr dso_local i32 @foo.resolver() #[[ATTR_RESOLVER:[0-9]+]] comdat
// WINDOWS: call void @__cpu_indicator_init()
// WINDOWS: call i32 @foo.arch_sandybridge
// WINDOWS: call i32 @foo.arch_ivybridge
@@ -293,9 +293,9 @@ void calls_pr50025c(void) { pr50025c(); }
// WINDOWS: call i32 @foo
/// Internal linkage resolvers do not use comdat.
-// ITANIUM: define internal ptr @foo_internal.resolver() {
+// ITANIUM: define internal ptr @foo_internal.resolver() #[[ATTR_RESOLVER]] {
-// WINDOWS: define internal i32 @foo_internal.resolver() {
+// WINDOWS: define internal i32 @foo_internal.resolver() #[[ATTR_RESOLVER]] {
// ITANIUM: define{{.*}} i32 @bar2()
// ITANIUM: call i32 @foo_inline.ifunc()
@@ -303,7 +303,7 @@ void calls_pr50025c(void) { pr50025c(); }
// WINDOWS: define dso_local i32 @bar2()
// WINDOWS: call i32 @foo_inline.resolver()
-// ITANIUM: define weak_odr ptr @foo_inline.resolver()
+// ITANIUM: define weak_odr ptr @foo_inline.resolver() #[[ATTR_RESOLVER]]
// LINUX-SAME: comdat
// ITANIUM: call void @__cpu_indicator_init()
// ITANIUM: ret ptr @foo_inline.arch_sandybridge
@@ -311,7 +311,7 @@ void calls_pr50025c(void) { pr50025c(); }
// ITANIUM: ret ptr @foo_inline.sse4.2
// ITANIUM: ret ptr @foo_inline
-// WINDOWS: define weak_odr dso_local i32 @foo_inline.resolver() comdat
+// WINDOWS: define weak_odr dso_local i32 @foo_inline.resolver() #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init()
// WINDOWS: call i32 @foo_inline.arch_sandybridge
// WINDOWS: call i32 @foo_inline.arch_ivybridge
@@ -324,12 +324,12 @@ void calls_pr50025c(void) { pr50025c(); }
// WINDOWS: define dso_local void @bar3()
// WINDOWS: call void @foo_decls.resolver()
-// ITANIUM: define weak_odr ptr @foo_decls.resolver()
+// ITANIUM: define weak_odr ptr @foo_decls.resolver() #[[ATTR_RESOLVER]]
// LINUX-SAME: comdat
// ITANIUM: ret ptr @foo_decls.sse4.2
// ITANIUM: ret ptr @foo_decls
-// WINDOWS: define weak_odr dso_local void @foo_decls.resolver() comdat
+// WINDOWS: define weak_odr dso_local void @foo_decls.resolver() #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @foo_decls.sse4.2
// WINDOWS: call void @foo_decls
@@ -339,7 +339,7 @@ void calls_pr50025c(void) { pr50025c(); }
// WINDOWS: define dso_local void @bar4()
// WINDOWS: call void @foo_multi.resolver(i32 noundef 1, double noundef 5.{{[0+e]*}})
-// ITANIUM: define weak_odr ptr @foo_multi.resolver()
+// ITANIUM: define weak_odr ptr @foo_multi.resolver() #[[ATTR_RESOLVER]]
// LINUX-SAME: comdat
// ITANIUM: and i32 %{{.*}}, 4352
// ITANIUM: icmp eq i32 %{{.*}}, 4352
@@ -353,7 +353,7 @@ void calls_pr50025c(void) { pr50025c(); }
// ITANIUM: ret ptr @foo_multi.avx_sse4.2
// ITANIUM: ret ptr @foo_multi
-// WINDOWS: define weak_odr dso_local void @foo_multi.resolver(i32 %0, double %1) comdat
+// WINDOWS: define weak_odr dso_local void @foo_multi.resolver(i32 %0, double %1) #[[ATTR_RESOLVER]] comdat
// WINDOWS: and i32 %{{.*}}, 4352
// WINDOWS: icmp eq i32 %{{.*}}, 4352
// WINDOWS: call void @foo_multi.fma4_sse4.2(i32 %0, double %1)
@@ -392,20 +392,20 @@ void calls_pr50025c(void) { pr50025c(); }
// WINDOWS: call i32 @fwd_decl_default.resolver()
// WINDOWS: call i32 @fwd_decl_avx.resolver()
-// ITANIUM: define weak_odr ptr @fwd_decl_default.resolver()
+// ITANIUM: define weak_odr ptr @fwd_decl_default.resolver() #[[ATTR_RESOLVER]]
// LINUX-SAME: comdat
// ITANIUM: call void @__cpu_indicator_init()
// ITANIUM: ret ptr @fwd_decl_default
-// ITANIUM: define weak_odr ptr @fwd_decl_avx.resolver()
+// ITANIUM: define weak_odr ptr @fwd_decl_avx.resolver() #[[ATTR_RESOLVER]]
// LINUX-SAME: comdat
// ITANIUM: call void @__cpu_indicator_init()
// ITANIUM: ret ptr @fwd_decl_avx.avx
// ITANIUM: ret ptr @fwd_decl_avx
-// WINDOWS: define weak_odr dso_local i32 @fwd_decl_default.resolver() comdat
+// WINDOWS: define weak_odr dso_local i32 @fwd_decl_default.resolver() #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init()
// WINDOWS: call i32 @fwd_decl_default
-// WINDOWS: define weak_odr dso_local i32 @fwd_decl_avx.resolver() comdat
+// WINDOWS: define weak_odr dso_local i32 @fwd_decl_avx.resolver() #[[ATTR_RESOLVER]] comdat
// WINDOWS: call void @__cpu_indicator_init()
// WINDOWS: call i32 @fwd_decl_avx.avx
// WINDOWS: call i32 @fwd_decl_avx
@@ -478,12 +478,14 @@ void calls_pr50025c(void) { pr50025c(); }
// WINDOWS: define linkonce_odr dso_local void @pr50025c() #{{[0-9]*}} comdat
// WINDOWS: call void @pr50025b.resolver()
-// ITANIUM: define weak_odr ptr @pr50025b.resolver()
+// ITANIUM: define weak_odr ptr @pr50025b.resolver() #[[ATTR_RESOLVER]]
// LINUX-SAME: comdat
// ITANIUM: ret ptr @pr50025b
// ITANIUM: define linkonce void @pr50025b()
// ITANIUM: call void @must_be_emitted()
-// WINDOWS: define weak_odr dso_local void @pr50025b.resolver() comdat
+// WINDOWS: define weak_odr dso_local void @pr50025b.resolver() #[[ATTR_RESOLVER]] comdat
// WINDOWS: musttail call void @pr50025b()
// WINDOWS: define linkonce_odr dso_local void @pr50025b() #{{[0-9]*}} comdat
// WINDOWS: call void @must_be_emitted()
+
+// CHECK: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }
diff --git a/clang/test/CodeGen/attr-target-version-riscv.c b/clang/test/CodeGen/attr-target-version-riscv.c
index fbead04caf455..96f0c37e06725 100644
--- a/clang/test/CodeGen/attr-target-version-riscv.c
+++ b/clang/test/CodeGen/attr-target-version-riscv.c
@@ -49,7 +49,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7();
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @foo1.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo1.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -74,7 +75,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7();
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @foo2.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo2.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -112,7 +114,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7();
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @foo3.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo3.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -150,7 +153,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7();
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @foo4.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo4.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -201,7 +205,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7();
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @foo5.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo5.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -252,7 +257,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7();
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @foo6.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo6.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -303,7 +309,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7();
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @foo7.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @foo7.resolver()
+// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
diff --git a/clang/test/CodeGenCXX/attr-cpuspecific.cpp b/clang/test/CodeGenCXX/attr-cpuspecific.cpp
index 225c6a5c742a5..fc0e1da6edb95 100644
--- a/clang/test/CodeGenCXX/attr-cpuspecific.cpp
+++ b/clang/test/CodeGenCXX/attr-cpuspecific.cpp
@@ -1,6 +1,6 @@
-// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=LINUX
-// RUN: %clang_cc1 -triple x86_64-apple-macos -emit-llvm -o - %s | FileCheck %s --check-prefix=LINUX
-// RUN: %clang_cc1 -triple x86_64-windows-pc -fms-compatibility -emit-llvm -o - %s | FileCheck %s --check-prefix=WINDOWS
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,LINUX
+// RUN: %clang_cc1 -triple x86_64-apple-macos -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,LINUX
+// RUN: %clang_cc1 -triple x86_64-windows-pc -fms-compatibility -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,WINDOWS
struct S {
__attribute__((cpu_specific(atom)))
@@ -16,14 +16,16 @@ void foo() {
// LINUX: @_ZN1S4FuncEv = weak_odr alias void (ptr), ptr @_ZN1S4FuncEv.ifunc
// LINUX: @_ZN1S4FuncEv.ifunc = weak_odr ifunc void (ptr), ptr @_ZN1S4FuncEv.resolver
-// LINUX: define weak_odr ptr @_ZN1S4FuncEv.resolver
+// LINUX: define weak_odr ptr @_ZN1S4FuncEv.resolver() #[[ATTR_RESOLVER:[0-9]+]]
// LINUX: ret ptr @_ZN1S4FuncEv.S
// LINUX: ret ptr @_ZN1S4FuncEv.O
// LINUX: declare void @_ZN1S4FuncEv.S
// LINUX: define linkonce_odr void @_ZN1S4FuncEv.O
-// WINDOWS: define weak_odr dso_local void @"?Func at S@@QEAAXXZ"(ptr %0) comdat
+// WINDOWS: define weak_odr dso_local void @"?Func at S@@QEAAXXZ"(ptr %0) #[[ATTR_RESOLVER:[0-9]+]] comdat
// WINDOWS: musttail call void @"?Func at S@@QEAAXXZ.S"(ptr %0)
// WINDOWS: musttail call void @"?Func at S@@QEAAXXZ.O"(ptr %0)
// WINDOWS: declare dso_local void @"?Func at S@@QEAAXXZ.S"
// WINDOWS: define linkonce_odr dso_local void @"?Func at S@@QEAAXXZ.O"
+
+// CHECK: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }
diff --git a/clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp b/clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
index a502d24f17880..1992f08d89a87 100644
--- a/clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
+++ b/clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
@@ -106,7 +106,8 @@ void run_foo_tml() {
// CHECK-NEXT: ret i32 4
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z7foo_ovli.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z7foo_ovli.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -147,7 +148,8 @@ void run_foo_tml() {
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @_ZN7MyClassIssE7foo_tmlEv.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_ZN7MyClassIssE7foo_tmlEv.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
diff --git a/clang/test/CodeGenCXX/attr-target-clones-riscv.cpp b/clang/test/CodeGenCXX/attr-target-clones-riscv.cpp
index 7e57b1437e2e1..693fec04e1e1c 100644
--- a/clang/test/CodeGenCXX/attr-target-clones-riscv.cpp
+++ b/clang/test/CodeGenCXX/attr-target-clones-riscv.cpp
@@ -52,7 +52,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5()+ foo6() + foo7() +
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo1v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo1v.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -83,7 +84,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5()+ foo6() + foo7() +
// CHECK-NEXT: ret i32 2
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo2v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo2v.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -115,7 +117,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5()+ foo6() + foo7() +
// CHECK-NEXT: ret i32 3
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo3v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo3v.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -140,7 +143,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5()+ foo6() + foo7() +
// CHECK-NEXT: ret i32 4
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo4v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo4v.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -159,7 +163,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5()+ foo6() + foo7() +
// CHECK-NEXT: ret i32 5
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo5v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo5v.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: ret ptr @_Z4foo5v.default
@@ -177,7 +182,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5()+ foo6() + foo7() +
// CHECK-NEXT: ret i32 2
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo6v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo6v.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -214,7 +220,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5()+ foo6() + foo7() +
// CHECK-NEXT: ret i32 2
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo7v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo7v.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -265,7 +272,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5()+ foo6() + foo7() +
// CHECK-NEXT: ret i32 2
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo8v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo8v.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -316,7 +324,8 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5()+ foo6() + foo7() +
// CHECK-NEXT: ret i32 2
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo9v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo9v.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -367,6 +376,7 @@ int bar() { return foo1() + foo2() + foo3() + foo4() + foo5()+ foo6() + foo7() +
//
//.
// CHECK: attributes #[[ATTR0]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+m,+zmmul" }
+// CHECK: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }
// CHECK: attributes #[[ATTR1]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+m,+zbb,+zmmul" }
// CHECK: attributes #[[ATTR2]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+c,+i,+m,+zbb,+zca,+zmmul" }
// CHECK: attributes #[[ATTR3]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+d,+f,+i,+m,+v,+zbb,+zicsr,+zmmul,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b" }
diff --git a/clang/test/CodeGenCXX/attr-target-clones.cpp b/clang/test/CodeGenCXX/attr-target-clones.cpp
index 0814df312f4d8..5cc9c61134cea 100644
--- a/clang/test/CodeGenCXX/attr-target-clones.cpp
+++ b/clang/test/CodeGenCXX/attr-target-clones.cpp
@@ -1,59 +1,39 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6
// RUN: %clang_cc1 -std=c++11 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefixes=ITANIUM,LINUX
// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-macos -emit-llvm %s -o - | FileCheck %s --check-prefixes=ITANIUM,DARWIN
// RUN: %clang_cc1 -std=c++11 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS
-// DARWIN-NOT: comdat
// Aliases for ifuncs
-// ITANIUM: @_Z10overloadedi.ifunc = weak_odr alias i32 (i32), ptr @_Z10overloadedi
-// ITANIUM: @_Z10overloadedPKc.ifunc = weak_odr alias i32 (ptr), ptr @_Z10overloadedPKc
-// ITANIUM: @_ZN1CIssE3fooEv.ifunc = weak_odr alias i32 (ptr), ptr @_ZN1CIssE3fooEv
-// ITANIUM: @_ZN1CIisE3fooEv.ifunc = weak_odr alias i32 (ptr), ptr @_ZN1CIisE3fooEv
-// ITANIUM: @_ZN1CIdfE3fooEv.ifunc = weak_odr alias i32 (ptr), ptr @_ZN1CIdfE3fooEv
// Overloaded ifuncs
-// ITANIUM: @_Z10overloadedi = weak_odr ifunc i32 (i32), ptr @_Z10overloadedi.resolver
-// ITANIUM: @_Z10overloadedPKc = weak_odr ifunc i32 (ptr), ptr @_Z10overloadedPKc.resolver
// struct 'C' ifuncs, note the 'float, U' one doesn't get one.
-// ITANIUM: @_ZN1CIssE3fooEv = weak_odr ifunc i32 (ptr), ptr @_ZN1CIssE3fooEv.resolver
-// ITANIUM: @_ZN1CIisE3fooEv = weak_odr ifunc i32 (ptr), ptr @_ZN1CIisE3fooEv.resolver
-// ITANIUM: @_ZN1CIdfE3fooEv = weak_odr ifunc i32 (ptr), ptr @_ZN1CIdfE3fooEv.resolver
+//
int __attribute__((target_clones("sse4.2", "default"))) overloaded(int) { return 1; }
-// ITANIUM: define {{.*}}i32 @_Z10overloadedi.sse4.2.0(i32{{.+}})
-// ITANIUM: define {{.*}}i32 @_Z10overloadedi.default.1(i32{{.+}})
-// ITANIUM: define weak_odr ptr @_Z10overloadedi.resolver()
-// LINUX-SAME: comdat
-// ITANIUM: ret ptr @_Z10overloadedi.sse4.2.0
-// ITANIUM: ret ptr @_Z10overloadedi.default.1
-
-// WINDOWS: define dso_local noundef i32 @"?overloaded@@YAHH at Z.sse4.2.0"(i32{{.+}})
-// WINDOWS: define dso_local noundef i32 @"?overloaded@@YAHH at Z.default.1"(i32{{.+}})
-// WINDOWS: define weak_odr dso_local i32 @"?overloaded@@YAHH at Z"(i32{{.+}}) comdat
-// WINDOWS: call i32 @"?overloaded@@YAHH at Z.sse4.2.0"
-// WINDOWS: call i32 @"?overloaded@@YAHH at Z.default.1"
+
+//
int __attribute__((target_clones("arch=ivybridge", "default"))) overloaded(const char *) { return 2; }
-// ITANIUM: define {{.*}}i32 @_Z10overloadedPKc.arch_ivybridge.0(ptr{{.+}})
-// ITANIUM: define {{.*}}i32 @_Z10overloadedPKc.default.1(ptr{{.+}})
-// ITANIUM: define weak_odr ptr @_Z10overloadedPKc.resolver()
-// LINUX-SAME: comdat
-// ITANIUM: ret ptr @_Z10overloadedPKc.arch_ivybridge.0
-// ITANIUM: ret ptr @_Z10overloadedPKc.default.1
-
-// WINDOWS: define dso_local noundef i32 @"?overloaded@@YAHPEBD at Z.arch_ivybridge.0"(ptr{{.+}})
-// WINDOWS: define dso_local noundef i32 @"?overloaded@@YAHPEBD at Z.default.1"(ptr{{.+}})
-// WINDOWS: define weak_odr dso_local i32 @"?overloaded@@YAHPEBD at Z"(ptr{{.+}}) comdat
-// WINDOWS: call i32 @"?overloaded@@YAHPEBD at Z.arch_ivybridge.0"
-// WINDOWS: call i32 @"?overloaded@@YAHPEBD at Z.default.1"
+
+// LINUX-LABEL: define dso_local void @_Z14use_overloadedv(
+// LINUX-SAME: ) #[[ATTR1:[0-9]+]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[CALL:%.*]] = call noundef i32 @_Z10overloadedi(i32 noundef 1)
+// LINUX-NEXT: [[CALL1:%.*]] = call noundef i32 @_Z10overloadedPKc(ptr noundef null)
+// LINUX-NEXT: ret void
+//
+// DARWIN-LABEL: define void @_Z14use_overloadedv(
+// DARWIN-SAME: ) #[[ATTR1:[0-9]+]] {
+// DARWIN-NEXT: [[ENTRY:.*:]]
+// DARWIN-NEXT: [[CALL:%.*]] = call noundef i32 @_Z10overloadedi(i32 noundef 1)
+// DARWIN-NEXT: [[CALL1:%.*]] = call noundef i32 @_Z10overloadedPKc(ptr noundef null)
+// DARWIN-NEXT: ret void
+//
void use_overloaded() {
overloaded(1);
- // ITANIUM: call noundef i32 @_Z10overloadedi
- // WINDOWS: call noundef i32 @"?overloaded@@YAHH at Z"
overloaded(nullptr);
- // ITANIUM: call noundef i32 @_Z10overloadedPKc
- // WINDOWS: call noundef i32 @"?overloaded@@YAHPEBD at Z"
}
template<typename T, typename U>
@@ -69,67 +49,56 @@ struct C<float, U> {
int foo(){ return 2;}
};
template<>
+//
struct C<double, float> {
int __attribute__((target_clones("sse4.2", "default"))) foo(){ return 3;}
};
+// LINUX-LABEL: define dso_local void @_Z16uses_specializedv(
+// LINUX-SAME: ) #[[ATTR1]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[C:%.*]] = alloca [[STRUCT_C:%.*]], align 1
+// LINUX-NEXT: [[C2:%.*]] = alloca [[STRUCT_C_0:%.*]], align 1
+// LINUX-NEXT: [[C3:%.*]] = alloca [[STRUCT_C_1:%.*]], align 1
+// LINUX-NEXT: [[C4:%.*]] = alloca [[STRUCT_C_2:%.*]], align 1
+// LINUX-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN1CIssE3fooEv(ptr noundef nonnull align 1 dereferenceable(1) [[C]])
+// LINUX-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZN1CIisE3fooEv(ptr noundef nonnull align 1 dereferenceable(1) [[C2]])
+// LINUX-NEXT: [[CALL2:%.*]] = call noundef i32 @_ZN1CIfsE3fooEv(ptr noundef nonnull align 1 dereferenceable(1) [[C3]])
+// LINUX-NEXT: [[CALL3:%.*]] = call noundef i32 @_ZN1CIdfE3fooEv(ptr noundef nonnull align 1 dereferenceable(1) [[C4]])
+// LINUX-NEXT: ret void
+//
+// DARWIN-LABEL: define void @_Z16uses_specializedv(
+// DARWIN-SAME: ) #[[ATTR1]] {
+// DARWIN-NEXT: [[ENTRY:.*:]]
+// DARWIN-NEXT: [[C:%.*]] = alloca [[STRUCT_C:%.*]], align 1
+// DARWIN-NEXT: [[C2:%.*]] = alloca [[STRUCT_C_0:%.*]], align 1
+// DARWIN-NEXT: [[C3:%.*]] = alloca [[STRUCT_C_1:%.*]], align 1
+// DARWIN-NEXT: [[C4:%.*]] = alloca [[STRUCT_C_2:%.*]], align 1
+// DARWIN-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN1CIssE3fooEv(ptr noundef nonnull align 1 dereferenceable(1) [[C]])
+// DARWIN-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZN1CIisE3fooEv(ptr noundef nonnull align 1 dereferenceable(1) [[C2]])
+// DARWIN-NEXT: [[CALL2:%.*]] = call noundef i32 @_ZN1CIfsE3fooEv(ptr noundef nonnull align 1 dereferenceable(1) [[C3]])
+// DARWIN-NEXT: [[CALL3:%.*]] = call noundef i32 @_ZN1CIdfE3fooEv(ptr noundef nonnull align 1 dereferenceable(1) [[C4]])
+// DARWIN-NEXT: ret void
+//
void uses_specialized() {
C<short, short> c;
c.foo();
- // ITANIUM: call noundef i32 @_ZN1CIssE3fooEv(ptr
- // WINDOWS: call noundef i32 @"?foo@?$C at FF@@QEAAHXZ"(ptr
C<int, short> c2;
c2.foo();
- // ITANIUM: call noundef i32 @_ZN1CIisE3fooEv(ptr
- // WINDOWS: call noundef i32 @"?foo@?$C at HF@@QEAAHXZ"(ptr
C<float, short> c3;
c3.foo();
// Note this is not an ifunc/mv
- // ITANIUM: call noundef i32 @_ZN1CIfsE3fooEv(ptr
- // WINDOWS: call noundef i32 @"?foo@?$C at MF@@QEAAHXZ"(ptr
C<double, float> c4;
c4.foo();
- // ITANIUM: call noundef i32 @_ZN1CIdfE3fooEv(ptr
- // WINDOWS: call noundef i32 @"?foo@?$C at NM@@QEAAHXZ"(ptr
}
-// ITANIUM: define weak_odr ptr @_ZN1CIssE3fooEv.resolver()
-// LINUX-SAME: comdat
-// ITANIUM: ret ptr @_ZN1CIssE3fooEv.sse4.2.0
-// ITANIUM: ret ptr @_ZN1CIssE3fooEv.default.1
-
-// WINDOWS: define {{.*}}i32 @"?foo@?$C at FF@@QEAAHXZ"(ptr
-// WINDOWS: call i32 @"?foo@?$C at FF@@QEAAHXZ.sse4.2.0"
-// WINDOWS: call i32 @"?foo@?$C at FF@@QEAAHXZ.default.1"
-
-// ITANIUM: define weak_odr ptr @_ZN1CIisE3fooEv.resolver()
-// LINUX-SAME: comdat
-// ITANIUM: ret ptr @_ZN1CIisE3fooEv.sse4.2.0
-// ITANIUM: ret ptr @_ZN1CIisE3fooEv.default.1
-
-// WINDOWS: define {{.*}}i32 @"?foo@?$C at HF@@QEAAHXZ"(ptr
-// WINDOWS: call i32 @"?foo@?$C at HF@@QEAAHXZ.sse4.2.0"
-// WINDOWS: call i32 @"?foo@?$C at HF@@QEAAHXZ.default.1"
-
-// ITANIUM: define weak_odr ptr @_ZN1CIdfE3fooEv.resolver()
-// LINUX-SAME: comdat
-// ITANIUM: ret ptr @_ZN1CIdfE3fooEv.sse4.2.0
-// ITANIUM: ret ptr @_ZN1CIdfE3fooEv.default.1
-
-// WINDOWS: define {{.*}}i32 @"?foo@?$C at NM@@QEAAHXZ"(ptr
-// WINDOWS: call i32 @"?foo@?$C at NM@@QEAAHXZ.sse4.2.0"
-// WINDOWS: call i32 @"?foo@?$C at NM@@QEAAHXZ.default.1"
-
-// ITANIUM: define {{.*}}i32 @_ZN1CIssE3fooEv.sse4.2.0(ptr
-// ITANIUM: define {{.*}}i32 @_ZN1CIssE3fooEv.default.1(ptr
-// ITANIUM: define {{.*}}i32 @_ZN1CIisE3fooEv.sse4.2.0(ptr
-// ITANIUM: define {{.*}}i32 @_ZN1CIisE3fooEv.default.1(ptr
-// ITANIUM: define {{.*}}i32 @_ZN1CIdfE3fooEv.sse4.2.0(ptr
-// ITANIUM: define {{.*}}i32 @_ZN1CIdfE3fooEv.default.1(ptr
-
-// WINDOWS: define {{.*}}i32 @"?foo@?$C at FF@@QEAAHXZ.sse4.2.0"(ptr
-// WINDOWS: define {{.*}}i32 @"?foo@?$C at FF@@QEAAHXZ.default.1"(ptr
-// WINDOWS: define {{.*}}i32 @"?foo@?$C at HF@@QEAAHXZ.sse4.2.0"(ptr
-// WINDOWS: define {{.*}}i32 @"?foo@?$C at HF@@QEAAHXZ.default.1"(ptr
-// WINDOWS: define {{.*}}i32 @"?foo@?$C at NM@@QEAAHXZ.sse4.2.0"(ptr
-// WINDOWS: define {{.*}}i32 @"?foo@?$C at NM@@QEAAHXZ.default.1"(ptr
+
+
+
+
+
+
+
+//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+// ITANIUM: {{.*}}
+// WINDOWS: {{.*}}
diff --git a/clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp b/clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp
index 8f2fb5ef0df7e..a7681e559f53a 100644
--- a/clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp
+++ b/clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp
@@ -60,27 +60,27 @@ int bar() {
// WINDOWS: call noundef i32 @"?foo@@YAHH at Z.resolver"(i32 noundef 1)
// WINDOWS: call noundef i32 @"?foo at ns@@YAHH at Z.resolver"(i32 noundef 2)
-// ITANIUM: define weak_odr ptr @_Z3fooi.resolver()
+// ITANIUM: define weak_odr ptr @_Z3fooi.resolver() #[[ATTR_RESOLVER:[0-9]+]]
// LINUX-SAME: comdat
// ITANIUM: ret ptr @_Z3fooi.arch_sandybridge
// ITANIUM: ret ptr @_Z3fooi.arch_ivybridge
// ITANIUM: ret ptr @_Z3fooi.sse4.2
// ITANIUM: ret ptr @_Z3fooi
-// WINDOWS: define weak_odr dso_local i32 @"?foo@@YAHH at Z.resolver"(i32 %0) comdat
+// WINDOWS: define weak_odr dso_local i32 @"?foo@@YAHH at Z.resolver"(i32 %0) #[[ATTR_RESOLVER:[0-9]+]] comdat
// WINDOWS: call i32 @"?foo@@YAHH at Z.arch_sandybridge"(i32 %0)
// WINDOWS: call i32 @"?foo@@YAHH at Z.arch_ivybridge"(i32 %0)
// WINDOWS: call i32 @"?foo@@YAHH at Z.sse4.2"(i32 %0)
// WINDOWS: call i32 @"?foo@@YAHH at Z"(i32 %0)
-// ITANIUM: define weak_odr ptr @_ZN2ns3fooEi.resolver()
+// ITANIUM: define weak_odr ptr @_ZN2ns3fooEi.resolver() #[[ATTR_RESOLVER]]
// LINUX-SAME: comdat
// ITANIUM: ret ptr @_ZN2ns3fooEi.arch_sandybridge
// ITANIUM: ret ptr @_ZN2ns3fooEi.arch_ivybridge
// ITANIUM: ret ptr @_ZN2ns3fooEi.sse4.2
// ITANIUM: ret ptr @_ZN2ns3fooEi
-// WINDOWS: define weak_odr dso_local i32 @"?foo at ns@@YAHH at Z.resolver"(i32 %0) comdat
+// WINDOWS: define weak_odr dso_local i32 @"?foo at ns@@YAHH at Z.resolver"(i32 %0) #[[ATTR_RESOLVER]] comdat
// WINDOWS: call i32 @"?foo at ns@@YAHH at Z.arch_sandybridge"(i32 %0)
// WINDOWS: call i32 @"?foo at ns@@YAHH at Z.arch_ivybridge"(i32 %0)
// WINDOWS: call i32 @"?foo at ns@@YAHH at Z.sse4.2"(i32 %0)
diff --git a/clang/test/CodeGenCXX/attr-target-mv-member-funcs.cpp b/clang/test/CodeGenCXX/attr-target-mv-member-funcs.cpp
index f956890cf706e..59581b40e8b19 100644
--- a/clang/test/CodeGenCXX/attr-target-mv-member-funcs.cpp
+++ b/clang/test/CodeGenCXX/attr-target-mv-member-funcs.cpp
@@ -180,7 +180,8 @@ int templ_use() {
// ITANIUM: ret ptr @_ZN5templIdE3fooEi.sse4.2
// ITANIUM: ret ptr @_ZN5templIdE3fooEi
-// WINDOWS: define weak_odr dso_local i32 @"?foo@?$templ at N@@QEAAHH at Z.resolver"(ptr %0, i32 %1) comdat
+// WINDOWS: define weak_odr dso_local i32 @"?foo@?$templ at N@@QEAAHH at Z.resolver"(ptr %0, i32 %1)
+// WINDOWS-SAME: comdat
// WINDOWS: call i32 @"?foo@?$templ at N@@QEAAHH at Z.arch_sandybridge"
// WINDOWS: call i32 @"?foo@?$templ at N@@QEAAHH at Z.arch_ivybridge"
// WINDOWS: call i32 @"?foo@?$templ at N@@QEAAHH at Z.sse4.2"
diff --git a/clang/test/CodeGenCXX/attr-target-mv-out-of-line-defs.cpp b/clang/test/CodeGenCXX/attr-target-mv-out-of-line-defs.cpp
index 3c56cad3af914..8d6b178d45a25 100644
--- a/clang/test/CodeGenCXX/attr-target-mv-out-of-line-defs.cpp
+++ b/clang/test/CodeGenCXX/attr-target-mv-out-of-line-defs.cpp
@@ -54,7 +54,8 @@ int bar() {
// ITANIUM: ret ptr @_ZN1S3fooEi.sse4.2
// ITANIUM: ret ptr @_ZN1S3fooEi
-// WINDOWS: define weak_odr dso_local i32 @"?foo at S@@QEAAHH at Z.resolver"(ptr %0, i32 %1) comdat
+// WINDOWS: define weak_odr dso_local i32 @"?foo at S@@QEAAHH at Z.resolver"(ptr %0, i32 %1)
+// WINDOWS-SAME: comdat
// WINDOWS: call i32 @"?foo at S@@QEAAHH at Z.arch_sandybridge"(ptr %0, i32 %1)
// WINDOWS: call i32 @"?foo at S@@QEAAHH at Z.arch_ivybridge"(ptr %0, i32 %1)
// WINDOWS: call i32 @"?foo at S@@QEAAHH at Z.sse4.2"(ptr %0, i32 %1)
diff --git a/clang/test/CodeGenCXX/attr-target-mv-overloads.cpp b/clang/test/CodeGenCXX/attr-target-mv-overloads.cpp
index e30fbf4ef5027..5f0008313f54f 100644
--- a/clang/test/CodeGenCXX/attr-target-mv-overloads.cpp
+++ b/clang/test/CodeGenCXX/attr-target-mv-overloads.cpp
@@ -61,7 +61,8 @@ int bar2() {
// ITANIUM: ret ptr @_Z12foo_overloadv.sse4.2
// ITANIUM: ret ptr @_Z12foo_overloadv
-// WINDOWS: define weak_odr dso_local i32 @"?foo_overload@@YAHXZ.resolver"() comdat
+// WINDOWS: define weak_odr dso_local i32 @"?foo_overload@@YAHXZ.resolver"()
+// WINDOWS-SAME comdat
// WINDOWS: call i32 @"?foo_overload@@YAHXZ.arch_sandybridge"
// WINDOWS: call i32 @"?foo_overload@@YAHXZ.arch_ivybridge"
// WINDOWS: call i32 @"?foo_overload@@YAHXZ.sse4.2"
@@ -74,7 +75,8 @@ int bar2() {
// ITANIUM: ret ptr @_Z12foo_overloadi.sse4.2
// ITANIUM: ret ptr @_Z12foo_overloadi
-// WINDOWS: define weak_odr dso_local i32 @"?foo_overload@@YAHH at Z.resolver"(i32 %0) comdat
+// WINDOWS: define weak_odr dso_local i32 @"?foo_overload@@YAHH at Z.resolver"(i32 %0)
+// WINDOWS-SAME: comdat
// WINDOWS: call i32 @"?foo_overload@@YAHH at Z.arch_sandybridge"
// WINDOWS: call i32 @"?foo_overload@@YAHH at Z.arch_ivybridge"
// WINDOWS: call i32 @"?foo_overload@@YAHH at Z.sse4.2"
diff --git a/clang/test/CodeGenCXX/attr-target-version-riscv.cpp b/clang/test/CodeGenCXX/attr-target-version-riscv.cpp
index ffb4576b3cd30..dd0e6822e7e06 100644
--- a/clang/test/CodeGenCXX/attr-target-version-riscv.cpp
+++ b/clang/test/CodeGenCXX/attr-target-version-riscv.cpp
@@ -49,7 +49,8 @@ int bar() { return foo1() + foo2() + foo3(); }
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo1v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo1v.resolver()
+// CHECK-SAME: comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -74,7 +75,8 @@ int bar() { return foo1() + foo2() + foo3(); }
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo2v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo2v.resolver()
+// CHECK-SAME: comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -112,7 +114,8 @@ int bar() { return foo1() + foo2() + foo3(); }
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo3v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo3v.resolver()
+// CHECK-SAME comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -150,7 +153,8 @@ int bar() { return foo1() + foo2() + foo3(); }
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo4v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo4v.resolver()
+// CHECK-SAME: comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -201,7 +205,8 @@ int bar() { return foo1() + foo2() + foo3(); }
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo5v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo5v.resolver()
+// CHECK-SAME: comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -252,7 +257,8 @@ int bar() { return foo1() + foo2() + foo3(); }
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo6v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo6v.resolver()
+// CHECK-SAME: comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
@@ -303,7 +309,8 @@ int bar() { return foo1() + foo2() + foo3(); }
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z4foo7v.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z4foo7v.resolver()
+// CHECK-SAME: comdat {
// CHECK-NEXT: resolver_entry:
// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8
diff --git a/clang/test/CodeGenCXX/attr-target-version.cpp b/clang/test/CodeGenCXX/attr-target-version.cpp
index b6ba07ed29504..c62b0266f32c9 100644
--- a/clang/test/CodeGenCXX/attr-target-version.cpp
+++ b/clang/test/CodeGenCXX/attr-target-version.cpp
@@ -231,7 +231,8 @@ int bar() {
// CHECK-NEXT: ret i32 [[ADD3]]
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z3fooi.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z3fooi.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -245,7 +246,8 @@ int bar() {
// CHECK-NEXT: ret ptr @_Z3fooi.default
//
//
-// CHECK-LABEL: define weak_odr ptr @_Z3foov.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_Z3foov.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -259,7 +261,8 @@ int bar() {
// CHECK-NEXT: ret ptr @_Z3foov.default
//
//
-// CHECK-LABEL: define weak_odr ptr @_ZN7MyClass3gooEi.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_ZN7MyClass3gooEi.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -281,7 +284,8 @@ int bar() {
// CHECK-NEXT: ret ptr @_ZN7MyClass3gooEi.default
//
//
-// CHECK-LABEL: define weak_odr ptr @_ZN7MyClass23unused_with_default_defEv.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_ZN7MyClass23unused_with_default_defEv.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -295,7 +299,8 @@ int bar() {
// CHECK-NEXT: ret ptr @_ZN7MyClass23unused_with_default_defEv.default
//
//
-// CHECK-LABEL: define weak_odr ptr @_ZN7MyClass32unused_with_implicit_default_defEv.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_ZN7MyClass32unused_with_imp
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -309,7 +314,8 @@ int bar() {
// CHECK-NEXT: ret ptr @_ZN7MyClass32unused_with_implicit_default_defEv.default
//
//
-// CHECK-LABEL: define weak_odr ptr @_ZN7MyClass40unused_with_implicit_forward_default_defEv.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_ZN7MyClass40unused_with_implicit_forward_default_defEv.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -322,6 +328,7 @@ int bar() {
// CHECK: [[RESOLVER_ELSE]]:
// CHECK-NEXT: ret ptr @_ZN7MyClass40unused_with_implicit_forward_default_defEv.default
//
+// CHECK: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }
//.
// CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
// CHECK: [[META1:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}
diff --git a/clang/test/CodeGenCXX/fmv-namespace.cpp b/clang/test/CodeGenCXX/fmv-namespace.cpp
index 75f29e1c77975..4680b3954121b 100644
--- a/clang/test/CodeGenCXX/fmv-namespace.cpp
+++ b/clang/test/CodeGenCXX/fmv-namespace.cpp
@@ -72,7 +72,8 @@ __attribute((target_version("mops"))) int bar() { return 1; }
// CHECK-NEXT: ret i32 1
//
//
-// CHECK-LABEL: define weak_odr ptr @_ZN4Name3fooEv.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_ZN4Name3fooEv.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER:[0-9]+]] comdat {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -86,7 +87,8 @@ __attribute((target_version("mops"))) int bar() { return 1; }
// CHECK-NEXT: ret ptr @_ZN4Name3fooEv.default
//
//
-// CHECK-LABEL: define weak_odr ptr @_ZN3Foo3barEv.resolver() comdat {
+// CHECK-LABEL: define weak_odr ptr @_ZN3Foo3barEv.resolver(
+// CHECK-SAME: ) #[[ATTR_RESOLVER]] comdat {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
@@ -99,6 +101,7 @@ __attribute((target_version("mops"))) int bar() { return 1; }
// CHECK: [[RESOLVER_ELSE]]:
// CHECK-NEXT: ret ptr @_ZN3Foo3barEv.default
//
+// CHECK: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }
//.
// CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
// CHECK: [[META1:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}
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