[llvm] [AMDGPU] Initialize FrameOffsetReg for amdgpu_cs_chain functions (PR #165518)

[Diana Picus via llvm-commits]

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@@ -2170,13 +2171,13 @@ bool SIFrameLowering::hasFPImpl(const MachineFunction &MF) const {
     return MFI.getStackSize() != 0;
   }
 
-  return (frameTriviallyRequiresSP(MFI) &&
-          !MF.getInfo<SIMachineFunctionInfo>()->isChainFunction()) ||
-         MFI.isFrameAddressTaken() ||
-         MF.getSubtarget<GCNSubtarget>().getRegisterInfo()->hasStackRealignment(
-             MF) ||
-         mayReserveScratchForCWSR(MF) ||
-         MF.getTarget().Options.DisableFramePointerElim(MF);
+  return !MF.getInfo<SIMachineFunctionInfo>()->isChainFunction() &&
+         (frameTriviallyRequiresSP(MFI) || MFI.isFrameAddressTaken() ||
+          MF.getSubtarget<GCNSubtarget>()
+              .getRegisterInfo()
+              ->hasStackRealignment(MF) ||
+          mayReserveScratchForCWSR(MF) ||
+          MF.getTarget().Options.DisableFramePointerElim(MF));
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rovka wrote:

I think chain functions should honour DisableFramePointerElim.

As far as I know, we don't have a test with the frameaddress intrinsic, we should probably add one (if it does the wrong thing, add a FIXME and I can have a look at it if you don't have the time).

I have also just realized that CWSR support is probably broken for chain functions. That has a bit of a bigger scope than your current patch, so I can look into that one too (unless you're very interested in learning about it).

https://github.com/llvm/llvm-project/pull/165518