[llvm] [AMDGPU][SIInsertWaitCnts] Use RegUnits-based tracking (PR #162077)
Fabian Ritter via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 11 05:31:04 PST 2025
================
@@ -1035,9 +991,9 @@ void WaitcntBrackets::updateByEvent(WaitEventType E, MachineInstr &Inst) {
// Special cases where implicit register defs exists, such as M0 or VCC,
// but none with memory instructions.
for (const MachineOperand &Op : Inst.defs()) {
- RegInterval Interval = getRegInterval(&Inst, Op);
if (T == LOAD_CNT || T == SAMPLE_CNT || T == BVH_CNT) {
- if (Interval.first >= NUM_ALL_VGPRS)
+ if (!Context->TRI->isVectorRegister(*Context->MRI,
+ Op.getReg())) // TODO: add wrapper
----------------
ritter-x2a wrote:
```suggestion
if (!TRI->isVectorRegister(*MRI, Op.getReg())) // TODO: add wrapper
```
`TRI` and `MRI` from the `Context` are available in local variables.
A `bool SIInsertWaitcnts::isVectorRegister(Register)` wrapper might clean this and other places even further, though.
https://github.com/llvm/llvm-project/pull/162077
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