[llvm] RegisterCoalescer: Enable terminal rule by default for AMDGPU (PR #161621)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `ml-opt-devrel-x86-64` running on `ml-opt-devrel-x86-64-b2` while building `llvm` at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/175/builds/28529

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir' FAILED ********************
Exit Code: 1

Command Output (stdout):
--
# RUN: at line 2
/b/ml-opt-devrel-x86-64-b1/build/bin/llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -run-pass=register-coalescer -verify-coalescing -o - /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir | /b/ml-opt-devrel-x86-64-b1/build/bin/FileCheck /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir
# executed command: /b/ml-opt-devrel-x86-64-b1/build/bin/llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -run-pass=register-coalescer -verify-coalescing -o - /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir
# executed command: /b/ml-opt-devrel-x86-64-b1/build/bin/FileCheck /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir
# .---command stderr------------
# | /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir:19:16: error: CHECK-NEXT: is not on the line after the previous match
# |  ; CHECK-NEXT: undef [[S_MOV_B32_1:%[0-9]+]].sub0:sgpr_256 = S_MOV_B32 0
# |                ^
# | <stdin>:145:2: note: 'next' match was here
# |  undef %5.sub0:sgpr_256 = S_MOV_B32 0
# |  ^
# | <stdin>:143:38: note: previous match ended here
# |  undef %3.sub0:sgpr_128 = S_MOV_B32 1
# |                                      ^
# | <stdin>:144:1: note: non-matching line after previous match is here
# |  %13.sub2:sgpr_128 = S_MOV_B32 0
# | ^
# | 
# | Input file: <stdin>
# | Check file: /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir
# | 
# | -dump-input=help explains the following input dump.
# | 
# | Input was:
# | <<<<<<
# |          .
# |          .
# |          .
# |        140:   
# |        141:  %0:sgpr_64 = COPY $sgpr4_sgpr5 
# |        142:  undef %13.sub1:sgpr_128 = S_LOAD_DWORD_IMM %0, 0, 0 :: (dereferenceable invariant load (s32), align 16, addrspace 4) 
# |        143:  undef %3.sub0:sgpr_128 = S_MOV_B32 1 
# |        144:  %13.sub2:sgpr_128 = S_MOV_B32 0 
# |        145:  undef %5.sub0:sgpr_256 = S_MOV_B32 0 
# | next:19      !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
# |        146:  TENSOR_LOAD_TO_LDS_D2 %3, %5, 0, 0, implicit-def dead $tensorcnt, implicit $exec, implicit $tensorcnt 
# |        147:  %13.sub0:sgpr_128 = S_MOV_B32 1 
# |        148:  %3.sub1:sgpr_128 = COPY %3.sub0 
# |        149:   
# |        150:  bb.1: 
# |          .
# |          .
# |          .
# | >>>>>>
# `-----------------------------
...

```

</details>

https://github.com/llvm/llvm-project/pull/161621